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Yadis: Yet another discrete IV stage - Click HERE for Original Thread
hjelm
Hi all,
Inspired by Jocko's simple iv stage and Bricolo's suggestion , which he scrapped when the input impedance was too high. I thought a bit on how to fix the input voltage to a fixed value.

I am not sure this circuit works in real life but in simulation it performs quite good. ~-70db THD at 10k
If i replace the transistor models with sa970 and sc2240 instead and optimize the resistor values and look at 1k it says ~-90dB THD, third order dominating.
Now i do not beleive distorsion measurements in simulations but they are the only thing i have.

Can anyone comment on the concept at least, does it work at all. A friend of mine said the startup could be problematic and might require extra circuitry i.e if there is no current there is no way to get a current.

The idea to lower the input impedance lied in the fact that the Vbe is correlated to the Ic so i needed to copy the Ic of the input transistor to the one supplying the reference point to the input transistor base this meant i couldnt take this current to drive a output so i mirrored the current both ways and got fairly good results.

The circuit works down to +-5v if you limit the output swing but +-15 seems to give better distortion figures. The emitter resistors of both the input and the "mirror" are not equal to acheive optimum performance on both distortion and inout impedance.
R4_10 is slightly bigger than R4_9 and R4_11 to compensate for the base currents in the mirror. The R1_12 is a bit bigger than R0_13 to compensate for different currents in the devices.

The cascode on the output isn't necessary but the distortion went down a lot when i included it, optimum seems to be to place it some 4V from the rail (less if the rail is 5V of course).

Looking at transient step responses it looks very controlled and settles nicely.

If anyone wants to i'll post the simulation files, spice cir files.

And to intercept all those who will say just go build the damned thing and measure it, i would if i had the time, too many kids and dogs requireing attention! All i have time to do is come up with ideas and try them out in a simulator, i do not even have the measurement equipment to do the measurements.

Anyway here it is and if this is nothing new then just ignore my mad ramblings.
Jocko Homo
You want the inout Z as low as possible.

Simualtions are one thing, but in real life, the limit on mine was -80 dB at full output.

Jocko
Bricolo
If you want to go with current mirors, Mr Hawksford has a good article about IVs, and on page 20 you'll find a very well designed one based on mirors.

It uses a 1:1 miror, and a buffer after the I/V resistor. But there's certainly a possibility to modify it into a 1:3 or more curent miror

http://www.essex.ac.uk/ese/research...20amplifier.pdf
Elso Kwak
Hi hjelm,
I agree with Jocko that the inputimpedance should be as low as possible. The common base amplifier (also called grounded base) has the lowest input impedance of all three possible configurations. I believe that using a Sziklai pair as input has even lower input impedance, hope so.
I would connect Vref to the base of the input transitor. In your circuit a lot of current goes into the Vref pin.
The folded cascode is a nice way of level shifting and having a extra common-base amplifier.
I think Jocko's circuit is much more elegant as that of the Hawksford guy.
:confused:
jean-paul
A bit more respect for Hawksford, Elso ;)
Pedja
quote:
Originally posted by hjelm
If anyone wants to i'll post the simulation files, spice cir files.
Sure Hjelm, just drop them in, please.
quote:
Originally posted by Jocko Homo
Simualtions are one thing, but in real life, the limit on mine was -80 dB at full output.
Jocko, you kinda should try harder. It can be done better. Trust me.
quote:
Originally posted by Elso Kwak
I believe that using a Sziklai pair as input has even lower input impedance, hope so.
Elso, in the circuit you see above (or in the Hawksford's paper) the current mirrored back to the Q1 (or the first transistor of the "super pair" in the Hawksford's paper) yields practical zero input impedance of the circuit (100R-12 resistor must be removed, of course).

Pedja
Bricolo
Elso,

I didn't test Hawksford's IV yet, so I can't relly tell if it's good or not.
But I've read the article, and in it, he explains every choice he made. And he does this very well, the explanations are easy to understand, and seem very wise.

With all his explanations, he convinced me that the choices were good. That's a good point IMHO :)
Elso Kwak
quote:
Originally posted by Pedja

Sure Hjelm, just drop them in, please.


Jocko, you kinda should try harder. It can be done better. Trust me.


Elso, in the circuit you see above (or in the Hawksford's paper) the current mirrored back to the Q1 (or the first transistor of the "super pair" in the Hawksford's paper) yields practical zero input impedance of the circuit (100R-12 resistor must be removed, of course).

Pedja

Hi Pedja,
The input impedance is not zero as it should be as the the DAC current source has limited compliance. (Horowitz page 184).
Input impedance of a common base goes down when the collector-emittor current goes up. For example the CB-CB pair in Low Noise Electronic Design, Motchenbacher and Fitchen, has a Ri of 260 Ohm with 100µA of current. But the CB-CC pair with 1mA of current in the CB transistor has an input iimpedance of 29 Ohm.:cool:
hjelm
The thing is that i get a lower zin with the 100ohm resistor since i have the same emitter resistor in the transistor that gives me the reference voltage for the base of the common base transistor.
And it gives me a lower distortion as well.

Consider the case when the current through both the q1 and q2 are the same i get the same voltage drop over the resistors and provided that the Vbe is the same i have 0 volt on the input!
In simulation i trim it down to 110uv PP for 2.4mA PP in.

I admit that the circuit is not very suitable to a Vref other than ground since i feed back the current through it.

Admittedly when the current mirror cannot keep up i will have worse performance on input impedance than without but i choose to do that to get better distortion figures.

Didnt actually read the hawsford paper until now but the concept on the input is similar and yes the Zout is the 1k resistor so it needs a buffer.

I tried this configuration with wilson current mirrors as well but got worse figures, actually they were close but i found out i had made a mistake and when i did the mirrors as they should the distortion increased :bawling:.

And Jocko yes i wish i had the time to build it :bawling: :bawling: :bawling: .

As for the attached files the newivsa970.cir is the one with best performance on input impedance and distortion. The newiv.cir is the version with the BC850C BC860C models unoptimized.

I think there is a need to edit the include lines to adapt the path to the models (the relevant ones are included). The zenermodel include can be deleted.

Thanks for all the answers.
hjelm
Elso you cannot think of it as a CB only. Since you are moving the vref on the base (due to the mirroring of the current) you are lowering the input impedance.
janneman
Elso,

If I refer to the schematic in post # 1, assume an increase in DAC output current, then the current through the sting of transitors above will decrease, right? The level at node # 12 will tend to rise.

But, the current through the ref string of transistors also decreases because of the mirror action. If Vref is constant, that will decrease the level at node # 13 the same amount as the rise on # 12 would be. The net rise at # 12 is therefore zero (assuming perfect balance and mirror), and a zero voltage rise from a current increase is a zero input impedance. This is obtained by closed loop feedback, not as an inherent circuit attribute.

But that raises another question: why do we need the 100 ohm resistors, since we are talking currents here. They are at best superfluous, at worst limit the dynamic range.
What do you say?

Jan Didden
hjelm
Consider them the same as emitter degenerators in a current mirror that is where i got the idea to use them at all. The distortion went down in the simulations but i am not experienced enough to know why or if it is true.
Could it lessen the influence of different Vce on q1 and q2?

Reran the simulations and it seems that the distortion is unchanged if i remove them :bawling: a very small resistor (0.35ohm) was needed to acheive minimum input impedance ~0.6 ohm.

If i am rambling just say so and i will remain quiet.
janneman
Hjelm,

The 0.35 ohms may be required to balance all those mirrors and their base currents, I haven't looked in detail at that.

There is a difference with the emitter degeneration you mention. That is local feedback mostly used to linearize the Vbe vs Ie characteristic, at the expense of gain (they lower the gain of the stage). You can probably spend many threads here to discuss whether it is better to have low, linear gain with low feedback later on, or high non-linear gain with high feedback later on.

Anyway, your circuit works well because of overall feedback, but I think less than 0.6 ohms is possible with the number of transistors you use. Look at the Hawksford design for instance.

Still, rolling your own is also quite satisfying. I think 0.6 ohms would in practise be low enough to get a very good sounding I/V stage. The voltage excursions with a few mA of DAC current would not upset the DAC.

Jan Didden

Edit: I think a limitation on the performance is the fact that there is an unbalance in the base currents that are added/subtracted in the main input string vs the reference string. That give an unbalance not only in the two currents from the reference and the input, but also in the mirror gain which should ideally be one. If you can play around with that to make those two strings equal in that respect you may make quite an improvement in Zin.

BTW, what exactly is behind Vref?
hjelm
Vref is ground in my case as i designed towards the pcm1704.
I wouldnt feel comfortable with using this technique for anything but ground as vref but that is only my concern.

Got the rin down to 0.02 ohm but it is like balancing on a knife edge. I removed the 100ohm resistors on q1 q2, rather set them to a low value to avoid having to remove them from the netlist.

Balanced the current mirrors to acheive minimum voltage swing in and low distortion. The optimum was r49 100.865, really tricky to do in real life as the last figure also made an influence.

The optimum for low distortion on R411 was 95.

I can buy that i need to compensate the basecurrents in the left current mirror but why isn't it the same in the right one?
hjelm
Where is the actual feedback in this circuit? Is it via q1 and Vbe variations?
janneman
quote:
Originally posted by hjelm
Where is the actual feedback in this circuit? Is it via q1 and Vbe variations?


Yes, the input current changes the Q2 current, which via the mirror coupling and Q1 is returned as Vb correction to Q2. I think people like Cherry would call it a 'transfer resistance circuit'.

Jan Didden
janneman
quote:
Originally posted by hjelm
Vref is ground in my case as i designed towards the pcm1704.
I wouldnt feel comfortable with using this technique for anything but ground as vref but that is only my concern.

Got the rin down to 0.02 ohm but it is like balancing on a knife edge. I removed the 100ohm resistors on q1 q2, rather set them to a low value to avoid having to remove them from the netlist.

Balanced the current mirrors to acheive minimum voltage swing in and low distortion. The optimum was r49 100.865, really tricky to do in real life as the last figure also made an influence.

The optimum for low distortion on R411 was 95.

I can buy that i need to compensate the basecurrents in the left current mirror but why isn't it the same in the right one?

Hjelm,

This is interesting as an intellectual exercise, but in practise you will not get so close to balance because the transistors which are identical in a sim will vary all over the place (relatively speaking). Your best bet will be either to use IC transistor arrays and/or make one of the resistors a trimmer.

In practise, what you would do is input an ac signal current into the input and measure the signal voltage at the input. Adjust the trimmer for lowest signal (ideally zero for zero Zin).

Jan Didden

Edit: The right string current is not part of the feedback loop so has no influence on the balance conditions for zero Zin. The right string only determines the DC offset (and the gain of course).
Bricolo
Elso,

I haven't calculated it, but I think the Zin for the Hawksford's IV is an order of magnitude lower than 26R

Look at the schematic, the "input" stage is a sziklai transistor (aka CFP), in fact a cascoded sziklai.
CFP (and not Baxendal's super pair) has a very precisely set Vbe (Vbe of the "big" transistor. Vbe here is the voltage between the base of the grounded one, and the emitter of the "input" one). It's very close to zero (due to local feedback)

And this is even more true here, since both the transistors are running at the same current (there's a "3 legs current miror", one leg for the input transistor+cascode, one for the grounded transistor, one for the output)
peranders
quote:
Originally posted by hjelm
I am not sure this circuit works in real life but in simulation it performs quite good. ~-70db THD at 10k
If i replace the transistor models with sa970 and sc2240 instead and optimize the resistor values and look at 1k it says ~-90dB THD,
As Jocko point out (among others), the transistors in your simulation are 100% identical but this is not the case in real life. Unindentical parts creates distortion, right Jocko?

BTW: Have you thought making a current feedback amp in I/V mode? You can check here :censored: if you want to get inspired. It may be hard to succeed without any feedback or bias stabilization.

Have you checked BC847BS, cheap dual transistors.

hjelm
The hfe is lower for the 847B (are they available in C as well?) versions so i think the mirrors might perform worse due to that reason. For the current mirror isn't high hfe and matching Vbe at the bias Ic the critical factors?
janneman
I think there is a trade-off here. You really want both high Hfe AND good matching. But what would be better: Hfe of 500 with 5% match, of Hfe of 100 with 1% match? I dunno. Can't you move the B-C connection of Q1 to Q8? Then a matched pair for Q1 and Q2 would be usefull, independent of their Hfe.

Jan Didden
peranders
quote:
Originally posted by hjelm
The hfe is lower for the 847B (are they available in C as well?) versions so i think the mirrors might perform worse due to that reason. For the current mirror isn't high hfe and matching Vbe at the bias Ic the critical factors?
You noticed it was 847BS, S at the end, hfe 200-450, but in real life more than 300.

SSM2210, 2220 (=MAT02/03 but in SO08) from Analog Devices, maybe something? The picture above shows options for BC550C/847BS/860C/MAT02/SSM2210 in DIL08
janneman
P-A,

Those transistors are duals, but practically speaking as badly matched as two singles, look here:

diyAudio Forums Archive - Current match on BC857BS,BC847BS:
http://www.diyaudio.com/forums/showthread/t-1003.html
Since you contributed to that thread, I guess you knew they were badly matched? Tsk, tsk... On the other hand, another good opportunity to show off your boards without contributing to the thread. Well done.

Jan Didden
hjelm
I do not follow you on the B-C connection from q1 to q8???
I think the q1 and q2 would do better as matched even in the current configuration?
peranders
quote:
Originally posted by janneman
P-A,

Those transistors are duals, but practically speaking as badly matched as two singles, look here:

diyAudio Forums Archive - Current match on BC857BS,BC847BS

Jan Didden

Rather good matched in fact, tested this myself (picture above) but most important, they have good thermal coupling and the are really cheap.
janneman
quote:
Originally posted by peranders


Rather good matched in fact, tested this myself (picture above) but most important, they have good thermal coupling and the are really cheap.


Thermal coupling and price are not *most important* in this app, P-A. You know that very well. I hope.

Jan Didden
Jocko Homo
I've told you guys dozens of times.

I did that.......my dealers hated it, and I almost lost a lot of them.

That is why I came up with the I/V stage that I did.

(You know that, don't you, P-A? Of course, you do.)

Input impedance:

Since it is pretty much a function of Ie/26 type of relationship, I really doubt that you get 0.6 ohms looking into a single small-signal transistor. I don't care what your fancy simulator says. Real world says something else.

And try harder to get below -80 dB? Why.......any measurements I make below that are suspect. Unless I want to make a better source, and a notch filter, and.......well, -80 is good enough.

Especially when you look at how linear the DACs are.

No, I'll stick with what I have, and put my time and efforts to more productive activities.

Jocko
janneman
quote:
Originally posted by hjelm
I do not follow you on the B-C connection from q1 to q8???
I think the q1 and q2 would do better as matched even in the current configuration?

Hjelm,

I was thinking, if you can get rid of the C-B connection of Q1, then Q1 & Q2 would both have the same Ic/Ie ratio (assuming a match). But I realise it isn't possible with the current topology. Maybe I get a brainwave tonight...

In the meantime, check out THAT corporation, NPN/PNP etc arrays type THAT300, 320, 340. 5% Hfe match, 500uV Vbe match. Not cheap, about 10 $ each at profusionplc.com. But, imho, worth it.

Jan Didden
rlim
Jocko,
Couldn't you wrap around a single transistor gain stage to the cb transistor and lower the impedance by the gain of this stage ? I will also serve to linearise the iv conversion by reducing output conductance effects......

rlim
Elso Kwak
quote:
Originally posted by Jocko Homo
I've told you guys dozens of times.

I did that.......my dealers hated it, and I almost lost a lot of them.

That is why I came up with the I/V stage that I did.
Jocko
Hi Jocko,
What keeps me surprising in your story is that the current feedback IV intinitially got your blessing as units were shipped to dealers. Did it sound good to your ears?
;)
Elso Kwak
quote:
Originally posted by janneman
Elso,

If I refer to the schematic in post # 1, assume an increase in DAC output current, then the current through the sting of transitors above will decrease, right? The level at node # 12 will tend to rise.

But, the current through the ref string of transistors also decreases because of the mirror action. If Vref is constant, that will decrease the level at node # 13 the same amount as the rise on # 12 would be. The net rise at # 12 is therefore zero (assuming perfect balance and mirror), and a zero voltage rise from a current increase is a zero input impedance. This is obtained by closed loop feedback, not as an inherent circuit attribute.

But that raises another question: why do we need the 100 ohm resistors, since we are talking currents here. They are at best superfluous, at worst limit the dynamic range.
What do you say?

Jan Didden

Hi Jan,
I am sorry but I don't understand a Jota of your post.
:bawling:
janneman
quote:
Originally posted by Elso Kwak


Hi Jan,
I am sorry but I don't understand a Jota of your post.
:bawling:


Huh? What do you mean? The feedback mechanism, or the second part? Or neither (that means I really are in trouble..).

Jan Didden
hjelm
Don't bang my head jocko :smash: i know it is a theorethical value and will not be acheived in real life. I cannot understand why the mirrored current so you get the same Ie and Vbe drop is a problem. It should at least lower the input impedace compared to the common base input impedance.
Do not worry the quest for more than 80dB is only theorethical since i think the real life results will be worse. If the sim said -40dB i would start to worry.

I noticed that the circuit i have shown is wrong. The idraw should be connected to 7 and the resistor between ground and 7.
Jocko Homo
You assume that if I did, I would have been able to tell a difference.

C'mon......I'm an engineer.....all we do is measure.

Actually, the problems that they kveteched about were realted to dynamics. I have Magnepans, with open-loop amps. Dynamics were not the main design criteria.

I have feedback from several sources about a line of current feedback amps, made by a buddy of mine.

Same criticism. I was approached to talk him out of it.

Wasn't my company, or theirs. He already knew my thoughts, and only his opinion counted anyway. He liked it, he built it, he sold it.

For a while.


Anyway.......me...bang on your head..........?.....not at all. I'm a nice guy.

Snicker.


Just as long as I know that you don't believe distortion measurements on your simulator.

And we know that you don't.........

Jocko
Pedja
Oftenly lower distortion numbers shown by SPICE are probably caused by too linear characteristics of the used models. There was here one constructive thread on this topic. Once you learn to use the SPICE, you realize what a great tool it is. Of course, it will not tell you how the thing will sound. As the real world measurement won’t tell you that either.

I agree not only -80dB is low enough, -60dB can be good to me. Just wanted to say that it can be made for better specs. If you want them.

Hjelm, I had the problems with files you uploaded but I drew similar circuit and it shows very low input impedance, something like 0.02 Ohm, though it starts to rise after few tens of kHz. I’d be really surprised if this won’t be confirmed in reality.

Pedja
hjelm
Sorry you had problems with the models was it something wrong in them? Does anyone else have them working?
Pedja
Once the libraries/models were set adequately, there were problems with .control and .destroy commands. They are, depending on the used program, either not recognized or I got the message “missing cathode node for destroy”. Once I remove them and ran the analysis I have higher distortion values than those you mentioned, but I did not inspect the files in fact... cut the story short and drew the circuit.

Not the advice for this case, but generally I think in such situations it is better working option to upload LT SwCAD or MicroCap or some other’s software file that has free/demo version, and whose files include or can include used models.

Pedja
peranders
quote:
Originally posted by janneman
I guess you knew they were badly matched?
Not so bad, at least if they are used in an input stage. They produced input offset voltage of 1-3 mV. Try this with to separate devices! I must add that I have no info about the current gain matching but if the price is considered, they are very good :nod:
hjelm
Pedja:
Which file did you run and what distortion did you get?

I tried running the circuit with the ideal models but then it was just silly i got -116dB THD.

I am using Winspice but i have a feeling that the BC850C BC860C models from Siemens, actually it should be Infineon today, seems to be better than most, at least it is hard to get good values with them :D . These models were posted here in a thread somewhere.

Hjelm
janneman
quote:
Originally posted by hjelm
Pedja:
Which file did you run and what distortion did you get?

I tried running the circuit with the ideal models but then it was just silly i got -116dB THD.

I am using Winspice but i have a feeling that the BC850C BC860C models from Siemens, actually it should be Infineon today, seems to be better than most, at least it is hard to get good values with them :D . These models were posted here in a thread somewhere.

Hjelm

Please note that distortion measurements - THD - in Spice are *small signal* measurements, assuming linearization of the elements around the operating point. Fourier measurements are large-signal measurements, and as such much more realistic. So, even with perfect models, THD tends to be always too optimistic anyway.

Jan Didden
hjelm
I use the fourier command on a transient simulation. Is that a small signal model?

I get the same result from running a spec command on the transient simulation.

Maybe there is another way of doing THD measurements?
janneman
No, the .four and the spec are large signal, and there accuracy depends on the models. Transient is large-signal.

There exists an accurate THD test called Harmonic Balance, which basically is balancing the harmonic components and the carrier to get the output signal as computed. But to the best of my knowledge it is only used in some very expensive hf/vhf/uhf simulators.

Jan Didden
Pedja
quote:
Originally posted by hjelm
Pedja:
Which file did you run and what distortion did you get?

I tried running the circuit with the ideal models but then it was just silly i got -116dB THD.

I am using Winspice but i have a feeling that the BC850C BC860C models from Siemens, actually it should be Infineon today, seems to be better than most, at least it is hard to get good values with them :D . These models were posted here in a thread somewhere.

Hjelm
Hjelm,

IIRC it was the SA970 file. IIRC something like 50dB. But again, I did not check what has left of the file finally…

If you are interested for, here is the MicroCap file I made. Philips models for BC547C/557C are embedded. Run transient & AC analysis.

Distortion measurements in SPICE are based on the transient analysis and thus are not small signal measurements.

Pedja
hjelm
Thanks pedja.
Fiddled a bit with it and it was possible to remove the input dc offset some by increasing r3 to 126.

The addition of a cascode on the output didnt work as well as i had hoped for these transistors. N or was there any obvious improvement in trimming the resistor r13.

For those of you inclined to do current feedback, :D :D, it is possible to connect the resistor r7 between output and input.

This gives a bit of better performance -82dB second harmonic for the circuit pedja supplied, i have also cascoded the output and increased the r13 to 126 but i do not know if that is necessary.

To further improve the versatility of the circuit it is possible to include a lowpass filter by using the feedback, see the Hawksford IV paper for inspiration. He is keen on not using the ground for the high frequency feedback which seems like a good idea.

If you only desire a neat step response use a very small cap directly between output and input, 2p in my case. There was a bit of overshoot in the simulations without it.
hjelm
And for those of you who like mosfet :D .

The topology works with mosfets as well. I tried it with irf230 and irf9230 and it seems to work pretty well. The step response was slower but these are power mosfets so that isn't so strange, they were in a model package from irf that i already had so that is why i used them.

The results were, in the simulations at least, better with the mosfets, isuppose the current mirrors didn't have the base current leakage as problem.

Not changing a single resistor and only replacing the transistors i got a -83dB THD and 60uV input swing.

I use a Sziklai cascode on the output which in the simulations seems to do very much for the THD, is that to be expected?
The gain from using a simple caclode is a lot less, the mosfets also seem to be coping without cascode better than the bipolars.

Does anyone have a suggestion for mosfets, including models, to try?
hjelm
And for those of you who like both current feedback and mosfet the results are nice :D :D .
-97dB THD in simulations.

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