| Oli |
Application: AD1865N-K non-os dac, Kwak Asynchronous Reclocker
I have been reading a number of data sheets recently, but I keep encountering conflicting advice about decoupling ICs. I have a few questions someone might be able to help me with...
Q. Can I bypass VHC logic with a 220u OS-CON in parallel with a 0.1u ceramic? (Are these values appropriate?)
Q. Should I use resistors or inductors in the power supply lines of my VHC logic to further isolate each noise loop? (Which values?)
How does the situation differ with my OP627 Opamps? |
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| Guido Tent |
| quote: | Originally posted by Oli
Q. Can I bypass VHC logic with a 220u OS-CON in parallel with a 0.1u ceramic? (Are these values appropriate?)
Q. Should I use resistors or inductors in the power supply lines of my VHC logic to further isolate each noise loop? (Which values?)
How does the situation differ with my OP627 Opamps? |
Hi
These values will work in most cases.
Yes, you should use inductors, or preferably ferrite beads in series with the lines. In addition watch the Q of the whole decoupling network, otherwise it may resonate.
Opamps: I'd suggest seperate supplies, and 10 to 47 ohm in each supply line, and some decent audio grade lytics.
Take care of correct position of decoupling caps. Some more info can be found in an article I wrote while ago
http://httpd.chello.nl/~m.heijliger..._decoupling.pdf
enjoy |
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| Elso Kwak |
| quote: | Originally posted by Oli
Application: AD1865N-K non-os dac, Kwak Asynchronous Reclocker
I have been reading a number of data sheets recently, but I keep encountering conflicting advice about decoupling ICs. I have a few questions someone might be able to help me with...
Q. Can I bypass VHC logic with a 220u OS-CON in parallel with a 0.1u ceramic? (Are these values appropriate?)
Q. Should I use resistors or inductors in the power supply lines of my VHC logic to further isolate each noise loop? (Which values?)
How does the situation differ with my OP627 Opamps? |
Hi Oli,
You might find all answers here (80 pages!):
http://www.analog.com/UploadedFiles...9520527817b.pdf
:cool: |
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| Elso Kwak |
Hi Oli, I now realise that part of your questions may be my fault as I forgot to draw in the schematic the decoupling caps on the flip-flop IC's . Each one has 0.1µF ceramic cap directly at the powersupply pin (#14).
For me this goes without saying. Also there is a ferrite bead in the powersupply line between the oscillator and the logic IC's.:cool: |
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| fmak |
Opamps: I'd suggest seperate supplies, and 10 to 47 ohm in each supply line, and some decent audio grade lytics.
------------------------------------------------------------------------------
Guido
I have often wonder why some manufacturers favour this, whereas others seem to favour lowest PS impedance.
Anyone done sonic evaluation of adding RC filters to opamp PS?:angel: |
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| jewilson |
Oli,
The OSCON types caps are very good also somtime you might need to use a .01uf instead of .1.
Elso Kwak,
That's a great application note, it's very uptodate. |
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| Guido Tent |
| quote: | Originally posted by fmak
Opamps: I'd suggest seperate supplies, and 10 to 47 ohm in each supply line, and some decent audio grade lytics.
------------------------------------------------------------------------------
Guido
I have often wonder why some manufacturers favour this, whereas others seem to favour lowest PS impedance.
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Hi
I add resistors to dampen the decoupling. This may also be achieved by using lytics with high ESR
It is quite easy to simulate if your decoupling resonates or not
Ciao |
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| fmak |
I add resistors to dampen the decoupling. This may also be achieved by using lytics with high ESR
----------------------------------------------------------------
What does this do to the sound? |
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| Oli |
Thanks folks!
Indeed a very good technical article Elso. I need to spend some time to digest at 80 pages.
I am currently using the following devices with your asynchronous reclocker:
Cho-Drop
The data sheet claims they are better than ferrites.
Has anyone else had any experience of these? |
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| jewilson |
| Yes ferrites work well but you have to get the one for the correct frequency. So you have to select the right material. There are lots of possiblities with ferrites. |
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| Oli |
Let me get this clear....
With the VHC logic...
I can use 220u OS-CON and 0.1u ceramic and use ferrite beads to decouple the supply.
Q. Will the initial inrush current 'blow up' my 0.5A rated Cho-Drops?
With the OPA627 op-amp...
I can decouple with 220u OS-CON and 0.1u ceramic and place 10R resistors in the supply lines.
Q. Do I strictly need 2.5W resistors, or is the pulse length so short that a smaller power will do e.g. 0.125W?
I too have seen a lot of talk about low impedance supplies for audio op-amps. Is this simply a myth? If we add resistors do we not encourage a less robust supply? |
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| Guido Tent |
| quote: | Originally posted by Oli
Thanks folks!
Indeed a very good technical article Elso. I need to spend some time to digest at 80 pages.
I am currently using the following devices with your asynchronous reclocker:
Cho-Drop
The data sheet claims they are better than ferrites.
Has anyone else had any experience of these? |
interesting devices (or at least their name), but impedance wise they are no better than ferrites. They claim to be flat or reasonably flat between 50 MHz and 200 MHz.
What would be the advantage ? In series with signals I can see advantage, in supply lines I just want the highest impedance in the range of interest.
And they claim ferrites resonate, but they do not explain why the cho things wouldn't resonate
Anyhow, interesting |
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| Guido Tent |
| quote: | Originally posted by Oli
Thanks folks!
Indeed a very good technical article Elso. I need to spend some time to digest at 80 pages.
I am currently using the following devices with your asynchronous reclocker:
Cho-Drop
The data sheet claims they are better than ferrites.
Has anyone else had any experience of these? |
Just browsed. It is a not so good article. Wrt part 1
these guys still splitt ground planes, probably never heard of Kirchoff. And they believe quiet digital signals exist. Mr Fourier, where are you ?
Part 2 is OK as far as I can see
Part 3 is OK (Walt Jung was involved)
Part 4 is interesting (Thermal management)
Part 5: Measures OK, rationale lacking
Part 6 (shielding): Nice examples
After all it is not so bad but
NEVER split ground planes
Ciao |
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| Oli |
Thanks for reading it Guido.
Have you any thoughts about my previous message - about the resistor power rating?
I notice that in one of your articles you avoid bypassing Os-Cons with other capacitors due to further possible resonances. Is this a good idea? I have 100Mhz signals- surely Os-Cons alone will not do the bypass trick... |
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| jewilson |
Guido,
We always used multiple ground planes to reduce the noise is or Seismic Systems. So are you saying that incrorrect! Multiple ground planes are one of the best ways to reduce circulating ground currents.
So if that you mean split grounds are worse that a single ground plane for mixed signals application your wrong. Or maybe I have missunderstood you.
I had poor luck with HC types of logic. Best to stick with ALS or LS. CMOS can cause the the ground to bounce as it charges it up going from a high to a low state. Of course having multiple ground reduces this problem. |
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| Petter |
| quote: | Originally posted by Guido Tent
NEVER split ground planes
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Guido,
I am building a DAC. The DAC chip itself has analog and digital grounds. My original plan (and I have started layout) is/was to split the analog plane and connect them together at a point of my choosing (with an impedance of my choosing).
I totally want to understand your grounding proposal, but reading your posts did not make it click for me.
Would you care to elaborate so I can understand how to best take advantage of your advice?
Current setup is double sided (DAC chips both sides) SMD devices using 4 layer prints where I intended to have one power plane (split) and one ground plane (split but connected).
Thanks in advance.
Petter |
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| Oli |
To my horror I believe I am just understanding Guido's ground plane theory:
:eek:It's a single common analogue/digital ground plane!:eek:
Splitting the ground plane creates a 'bottleneck' for return currents to flow through and often a long current path. This is especially true if current needs flow from one side of the split to the other side.
A single large ground plane will reduce the aforementioned bottleneck and reduce the loop size for return currents.
As long as the plane covers sufficient area any delicate ground inputs should not be affected by large return currents, since resulting potential drops will be minimal.
Guido, do I correctly understand it?
Does this mean all the grounds on my current design: PLL, DGND, AGND etc should form one continuous ground plane? e.g. Solder AGND and DGND pins of my CS8412 to the common ground plane?
Interesting stuff... I am having to rethink my ideas about that stuff we call electricity...
:ashamed: |
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| Jocko Homo |
Yes, there are lots of different mixes, but usually only 3 get made into the little beads that we use, and one of them is by far the most common.
That is the one that Guido refers to.
Jim:
I think that in your old application, splitting the planes worked better. But for this high speed stuff, the loop is too large, and the EMI goes up.
So...........it depends on the application. I guess.
Jocko |
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| Oli |
If my understanding is correct...
On the bright side...
A single ground plane is easier to implement!
:) |
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| jewilson |
Jocko,
These are the practices we used at TI, and the stuff you can read in application notes from Analog Device, Burr Brown and others. If you building true RF hardware that is way out of the spectrum of the low frequencies, we see in CD and DAC's. Of course, some oscillations caused by poor ground, cheap diodes logic that's to fast create RF in low frequency designs.
Having said that, it is possible with do a careful layout to use a signal ground, however impedances and across the plane must be kept very low along with the supplies. Also, it possible to add extra grounds on buss bars, this can reduce the cost, I've done that before.
As we discussed, on RF shield must be connected on both end but on audio circuit require a connection a source. Doing this reduces currents in the shield.
Right, it depend on application and money and skill.
Keep the loop tight:) |
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| jewilson |
Oli,
What you can do is to add jumpers to connect the ground together. Also, add extra hole for power so you’re lay out is flexible.
So when you find that your noise is to high you can disconnect the ground planes. Or if you find the noise is ok you can leave the jumpers in. This also allows to pick several different location on the PCB where you'd thinks the ground currents will cancel.
:cool: |
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| jewilson |
| Grounding Methods |
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| Guido Tent |
| quote: | Originally posted by Oli
To my horror I believe I am just understanding Guido's ground plane theory:
:eek:It's a single common analogue/digital ground plane!:eek:
Splitting the ground plane creates a 'bottleneck' for return currents to flow through and often a long current path. This is especially true if current needs flow from one side of the split to the other side.
A single large ground plane will reduce the aforementioned bottleneck and reduce the loop size for return currents.
As long as the plane covers sufficient area any delicate ground inputs should not be affected by large return currents, since resulting potential drops will be minimal.
Guido, do I correctly understand it?
Does this mean all the grounds on my current design: PLL, DGND, AGND etc should form one continuous ground plane? e.g. Solder AGND and DGND pins of my CS8412 to the common ground plane?
Interesting stuff... I am having to rethink my ideas about that stuff we call electricity...
:ashamed: |
Oli,
Yes, you understand it right. In the case of ADC or DAC chips: Think of the loop the currents run that have to pass the A/D or D/A barier. Induced voltages in that loop may work out quity nasty/.
The bottom line
- All gnd pins of all parts to 1 plane
- Reduce currents through plane by
- Reducing current amplitude and frequency content
- Reducing the common part of currents (i.e. place decoupling caps - aka decaps VERY close to the ground pins of the ICs)
- Place ICs interacting with RF signals close to each other (use common sense)
sp the plane will be near equi potential
succes |
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| Jaka Racman |
Hi,
I think there is a misunderstanding regarding split ground planes. If one reads Analog Devices app note more carefully they do advocate puting complete ADC, DAC and clock source all on the same analog ground plane. You would use split plane only if digital part of the circuit is something like Pentium computer.
I have another question. I use SMD parts and double sided board. Because almost all of the connections are on the top side, top ground plane has many holes. Bottom ground plane is almost unbroken. Is there any advantage by stitching bottom and top ground plane with vias at regular interval (100-200mils) as oposed to placing vias only when there is discontinuity?
Second since board is fairly small, I can use thinner 0.8mm vs standard 1.6mm PCB. Would there be any advantage in that?
Best regards,
Jaka Racman |
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| jewilson |
If you have to use one ground plane, it should be continuous. Havening the plane on the bottom connected via feed through is ok, but the plane has to be a continuous plane.
Still the optimum way of connecting mixed signal with precision converters is to use multiple continuous ground planes. |
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| jewilson |
| Grounding methods one Single Point, Parrallel and Mulripoint Grounds. |
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| jewilson |
| Single point ground |
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| jewilson |
| Multipoint Grounding. |
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| jewilson |
| Pratical Grounding Methods |
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| jewilson |
| Low Frequency Grounding below 10 Mhz |
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| jewilson |
| This information is from Noise Reduction Techniques in Electronic System by OTT, Bell Labs ,ISBN 0-471-65726-3 and is considered the bible on noise reductions methods.;) |
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| Petter |
From my interpretation of the references shown in the last few postings, it would appear that in my application that using separate ground planes and hooking them up at a point of my choosing (the "star point") is preferable.
I guess Guido will disagree
and I am wondering what Jewilson will say about that.
Petter |
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| jewilson |
Peter,
This is what we did on our Seismic Systems at TI. Yes this does work the best if you need that last bit of resolutions from you dac.
Having said that, you still can run buss bars on you PCB to accomplish the same thing and reduce the cost of your PCB. |
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| Petter |
Thank you for that confirmation. I was getting a bit worried that I was not doing the right thing - and have already started layout :)
Petter |
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| Oli |
:att'n:
I believe Guido is trying to tell us that our digital 'square' waves are a Fourier summation of sine waves extending to infinately high frequencies. We should consider a simple audio DAC as a 'high frequency' circuit. In addition, spikes in the digital signal will further increase high frequency spectral content. A single plane is therefore preferred.
Is this right Guido?
Any further thoughts about my post #11: What power rating of resistor is appropriate to avoid initial inrush to the Os-Cons from destroying it. Can I get away with 0.125W, given the short pulse duration? |
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| jewilson |
Oh, please stop, I told you how you could prove or disprove what Analog Devices, Bell Labs and Burr Brown are say regarding grounding and noise. You are not convincing me from what Guido stated, I done this for a living and it works.
Find several points on your design and connect them with zero ohm resistors; however, you have to be able to provide power to the individual circuit’s planes areas.
Analog power should ground have its own return
Digital power ground should have its own return
Analog Signal ground should have its own return
In addition, if you keep using long run to from your supply and High Speed CMOS you are still going to have problems but not as bad, since the grounds are separate. However, your should build your circuit however you please.
:headbash: |
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| Petter |
Oli,
A 100uF capacitor holding 5V stores 2.75E-3 Joules. This is the worst case energy you have to transfer to the capacitor.
Now remembering that one Joule is 1W for 1 second, you will end up with .00275W being held by the capacitor.
Let's say that the current is constant over .1 second and assume the voltage is constant at half the 5V. My calculations indicate that your 10 Ohm resistor will dissipate 1mW in that time.
If we assume that the buildup takes place over .01 seconds, my estimates indicates resistor dissipation of .121W
This does of course exclude any power drawn by the load.
These estimates indicate there will not be a problem. The initial current will be maximum 5V/10 Ohm = .5A
This means that you will dissipate a maximum of 2.5W at that instant constantly reducing asymptotically as the voltage builds up. If you assume constant current of .5A
Allowing for errors and long circuit life I would put in at least a .5W but it is unlikely that you will have problems no matter what you go for.
Petter
(with a piece of paper, I would have done it with calculus :)) |
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| Guido Tent |
| quote: | Originally posted by Petter
From my interpretation of the references shown in the last few postings, it would appear that in my application that using separate ground planes and hooking them up at a point of my choosing (the "star point") is preferable.
I guess Guido will disagree
and I am wondering what Jewilson will say about that.
Petter |
Question 1
How, and which currents interact, e.g. run through that single point
Question 2: Do they run through the smallest loop possible
Question 3: How does the common mode impedance affect all currents
enjoy |
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| Guido Tent |
| quote: | Originally posted by jewilson
however, you have to be able to provide power to the individual circuit’s planes areas.
Analog power should ground have its own return
Digital power ground should have its own return
Analog Signal ground should have its own return
In addition, if you keep using long run to from your supply and High Speed CMOS you are still going to have problems but not as bad, since the grounds are separate. However, your should build your circuit however you please.
:headbash: |
If oy understand the principle of local decoupling, and AC (RF) impedance towards the supply line, you'll notice it is not a problem to supply energy to the various circuits on the PCB. By doing so, you reduce the supply currents through the supply lines to virtual DC, hence that same DC runs through the ground plane.
Tube amps consisting of more stages use the same principle, for other reasons though.
Ciao |
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| Guido Tent |
| quote: | Originally posted by Oli
:att'n:
I believe Guido is trying to tell us that our digital 'square' waves are a Fourier summation of sine waves extending to infinately high frequencies. We should consider a simple audio DAC as a 'high frequency' circuit. In addition, spikes in the digital signal will further increase high frequency spectral content. A single plane is therefore preferred.
Is this right Guido?
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Hi Oli,
Yes, that is the point, we talk RF here. And for any current above a few kHz, the inductance of the grounplane is what counts. Withe the return (or mirror) current "far" away, each mm has about 1 nH inductance. For the return current more close (hence depending on the layout), something like 0.5 nH/mm can be taken.
Please note that thicker, or wider ground does NOT change its' impedance, only its' resistance.
Current through that impedance gives a voltage across the groundplane, which is in series with all signals refering to the plane
Ciao |
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| jewilson |
Seems like I am dumb founded, that you've found the missing wide band decouple caps. I just have not seen that decoupling can completely reduce and absolve the switching noise at that components or across many circuits, even when their one per device.
Guido, to remove circulating ground currents they have to cancel if not they add. When you have multiple ground planes in a mixed signal, application cancellation becomes simple. You just cannot, compare a tube amps grounding scheme with a complex digital and analog systems.
As I stated before, one big fat ground plane layer can work, but it needs the proper circuit’s design and power low impedance power distribution and good decoupling. However, it is difficult to get their without expertise. A
Also, look up common mode rejection on the best opamp’s, it very poor in the MHz range.
Keep Build them clocks
Cheers
Jim |
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| Oli |
Thanks for the info Petter. I thought you could use a value lower than 2.5W, but clearly damage will occur if our resistor is not sufficiently robust.
:) |
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| Bricolo |
| quote: | Originally posted by Jocko Homo
Yes, there are lots of different mixes, but usually only 3 get made into the little beads that we use, and one of them is by far the most common.
That is the one that Guido refers to.
Jocko |
And what is it exactly? (the most common one) |
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| Guido Tent |
| quote: | Originally posted by jewilson
Seems like I am dumb founded, that you've found the missing wide band decouple caps. I just have not seen that decoupling can completely reduce and absolve the switching noise at that components or across many circuits, even when their one per device.
Guido, to remove circulating ground currents they have to cancel if not they add. When you have multiple ground planes in a mixed signal, application cancellation becomes simple. You just cannot, compare a tube amps grounding scheme with a complex digital and analog systems.
As I stated before, one big fat ground plane layer can work, but it needs the proper circuit’s design and power low impedance power distribution and good decoupling. However, it is difficult to get their without expertise. A
Also, look up common mode rejection on the best opamp’s, it very poor in the MHz range.
Keep Build them clocks
Cheers
Jim |
Hello Jim,
I agree on your remark on expertise & opamps
My main point is to prevent currents through the plane, by
- applying, and physically correctly connecting, decoupling capacitance (or shunt regulator)
- adding series impedance (RF) in each supply line
By doing so, no low impedance power distribtion scheme is required, simply because "DC" runs through the supply lines
I agree that this philosophy does not fully take away any noise currents through the plane, but 15 years of experience have shown that this philosophy gives far better results on AD and DA designs, when comparing them with any demo board I have seen (TI, BB, Crystal, you name them). I am talking signal integrity, not even RF emissions..........
In the basics my philosophy does not differ from my favourite tube amp grounding scheme
thanks for your reply, interesting discussion
enjoy |
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| jewilson |
Guido,
Your right, some of the demo boards are not so hot. You know, the engineers that design these demo boards are not the same people that design the chips and some don't have that much experience. Yea, I would not take my lead from a demo board from them either.
Regards |
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| Oli |
:xeye: My goodness:xeye:
I appear to have sparked debate!
If I can summarise for my own sake....
'A big fat ground plane' is great, but only if you can successfully implement it.
Q. Guido, are there any good example materials on the web to illustrate your design ideals? e.g. layout photos or diagrams.
I intend to produce a DIY dac and lack your wealth of experience.
I simply design my PCBs by eye, with educated guesses as to where return currents flow. To date I have used split grounding methods with no audiable problems, but could I do better with your methods?
For my situation:
Is a single ground plane or split grounding a safer overall bet?
(I am sure both parties will make their case here, so please be gentle!) |
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| Petter |
I am going to split everything, but the grounds will be connected at a point of my choosing. I am also using 4 layer boards and applying shield on several layers to try to keep the ground clean. Hopefully this will be adequate.
I have been doing layout around the DAC for the last few days (power only until today when I actually connected the outputs ....)
Interesting and timely discussion. Thanks to all contributors.
Petter |
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| Oli |
This discussion has given me loads of ideas.:hot:
I have a prototype of my DAC with 'star' earthing. It has already suffered significant modification and wants to fall apart!
I believe it can survive some further tweaking with the grounding. I want to prove to myself that connecting the different grounds at many points will do no harm- perhaps hint at improvement. Only then will I know if a ground plane is viable for my application, or that I should stick to the familiar 'star' method.
I notice that Guido prescribes the use of resistors in the digital signal path as a method to reduce the demand on the supply lines and hence the size of return currents. I am using VHC flip-flops for reclocking with a 100Mhz asynchronous clock.
Q. As a rule of thumb, will 1k resistors do the trick with all my HC and VHC logic?
Q. Has anyone else had success with using resistors in digital signal lines, or do you feel it hampers the signal-to-noise ratio?
Cheers... |
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| jewilson |
Peter,
That is the best thing you can do for a DAC is multilayered grounds. What kind of dac are you using and what are you doing for the supply and filters. :)
Oil,
If possible you should stick to ALS logic. High Speed COMS will under shoot ground and ring, dumbing spike on ground. Of course You really don't need 100Mhz clock. Try using one of Jocko Homo clocks their really clean. I mean dam clean. Also, 1K ohm is to large more like a 100ohm or lower.
:) :D |
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| Petter |
| quote: | Originally posted by jewilson
Peter,
That is the best thing you can do for a DAC is multilayered grounds. What kind of dac are you using and what are you doing for the supply and filters. :)
:) :D |
Thanks for the encouragement. I will do exactly this - one layer is power, another is ground, and then I will likely fill top and bottom with ground as well unless you recommend otherwise (initial plan was ground one side, power the other).
I am using multiple PCM1794's per channel in mono-mode. Currently I have a setup of 2 units stomach to stomach. Filtering on analog ground is one 0805 multilayer ceramic on each pin, as well as larger organic polymer electrolytics, also in SMD with mininal distance to pins. For power I am using 1206 multi-layer SMD's but have not yet finalized the larger caps - I will probably end up with SMD's right on these as well, at least where I have space, but then again there is a power plane so impedance is low anyway.
Filtering on digital ground and power is identical: one 0805 SMD + one larger SMD also set up for minimal distances to pins.
I have not yet decided what to do with power nor where to hook up the grounds. My plan is to have at least 4 DAC chips per channel, but I may end up trying with two :)
Suggestions for both analog and digital power would be most welcome. I am considering using high-speed op-amps as well as low speed supplies. This one is tricky. I quite like the "isolation approach suggested on this thread.
I aim to have analog +5V, 0V and +-18V.
Initially the unit is a graft into Behringer DCX2496 and so I can likely work directly from l/RCLK, BCLK, MCLK, SDATA and I may well choose to reclock these.
Petter |
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| jewilson |
Peter,
Check out this tread, I am using one a bunch of these regulators on my DAC. http://www.diyaudio.com/forums/show...37&goto=newpost read through most of the thread.
Also, If you using +/-12 volts for the analog you will have a larger option for the part you can use. Many of the new Opamp will pop with +/-15.
The next important issue is the receiver interface.
On the power leads if you put regulators very close to the DAC and opamps you'll have more options, or you can have longer runs. However it best to have the power supply outputs as close as possible.
:) |
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| Oli |
Jim,
Thanks for the info.
I am using VHC logic to accomodate a 100Mhz clock. The ALS data sheets I have read so far extend to only 80Mhz. I am using Elso Kwak's clock. It sounds fine and I do not wish to explore other options in this department yet..... (I realise that 100Mhz is not essential)
I will try some 100R resistors in line with the logic of my prototype. Can I put these in the clock line itself?
Cheers |
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| jewilson |
Oli,
Well use as few VHC gates and chips as possible. Tie all unused gate high through a resistor that the comon procedure. Decouple them with .01 and .001 caps. Also, If your using dip packages you can place the decoupling cap underneath and between the power and ground pins. |
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| Guido Tent |
| quote: | Originally posted by Oli
Q. Guido, are there any good example materials on the web to illustrate your design ideals? e.g. layout photos or diagrams.
I intend to produce a DIY dac and lack your wealth of experience.
I simply design my PCBs by eye, with educated guesses as to where return currents flow. To date I have used split grounding methods with no audiable problems, but could I do better with your methods?
For my situation:
Is a single ground plane or split grounding a safer overall bet?
(I am sure both parties will make their case here, so please be gentle!) |
Hi
you may look here
http://members.chello.nl/~m.heijlig...html/dactop.htm
and here
http://members.chello.nl/~m.heijlig..._decoupling.pdf
succes, especially to those splitting groundplanes |
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| jewilson |
Guido,
"We don't need no stinking luck" becuase it's the correct method. It's proven by Bell Labs, Analog Devices, Texas Instruments and others.:D |
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| Guido Tent |
| quote: | Originally posted by jewilson
Guido,
"We don't need no stinking luck" becuase it's the correct method. It's proven by Bell Labs, Analog Devices, Texas Instruments and others.:D |
Sure, and these companies are right, by definition
You do not want to know how many of their famous demo boards I improved.....
Anyhow, I gave my backgrounds and reasoning, and all of you are free to try it, or do it differently
Ciao |
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| jewilson |
Guido,
Maybe you should move to the US and teach us all how grounding must be implemented. It’s a amazing that us bunch of ignorant engineers at Texas Instruments were able to make $200 million dollars a year designing analog-digital acquisition with split grounds.
:h_ache: :rolleyes: |
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| Guido Tent |
| quote: | Originally posted by jewilson
Guido,
Maybe you should move to the US and teach us all how grounding must be implemented. It’s a amazing that us bunch of ignorant engineers at Texas Instruments were able to make $200 million dollars a year designing analog-digital acquisition with split grounds.
:h_ache: :rolleyes: |
Hi Jim
Been a few times to Texas, love the food over there, it is too hot though.....
I learned that audio applications are highly sensitive, and there is a major difference between a working (functional) application, and a decent sounding one.
I hear it, and I can measure it, otherwise I would have come up with different philosophy.
Suggestion: Measure the voltage (Time domain, wideband, say 200 MHz) between 2 planes.
regards
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Guido |
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| Oli |
Personally I will not discount any reasonable ground scheme
(unless its too much hassle :clown: )
I find it ironic that my 'good sounding' prototype is a culmination of the ideas of the big boys: Crystal Semiconductor, Philips, Burr Brown, Analogue Devices, Texas Instruments et al. It also includes the more 'maverick' ideas of individuals such as Kusunoki, Wildmonkeysects, Kwak, and now... Tent.
If it works for me I use it :D
Back to more technical matters....
The sizes of resistor in the data lines and clock line must matter:
I was going to make a big deal about the pulse width a 100Mhz, but suddenly I remembered the output of Elso Kwak's clock looks nothing like a square wave- any resistor in the data line may distort the waveform and induce jitter. Agree? No resistor in clock line?
How can you calculate the correct resistor for a given frequency? (or is it more a rule of thumb?)
In particular I am concerned with the Sdata, Sclk, Bclk lines. Will 100R do? |
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| Oli |
| Thanks for the links regarding examples Guido. |
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| Elso Kwak |
| quote: | Originally posted by Oli
Personally I will not discount any reasonable ground scheme
(unless its too much hassle :clown: )
I find it ironic that my 'good sounding' prototype is a culmination of the ideas of the big boys: Crystal Semiconductor, Philips, Burr Brown, Analogue Devices, Texas Instruments et al. It also includes the more 'maverick' ideas of individuals such as Kusunoki, Wildmonkeysects, Kwak, and now... Tent.
If it works for me I use it :D
Back to more technical matters....
The sizes of resistor in the data lines and clock line must matter:
I was going to make a big deal about the pulse width a 100Mhz, but suddenly I remembered the output of Elso Kwak's clock looks nothing like a square wave- any resistor in the data line may distort the waveform and induce jitter. Agree? No resistor in clock line?
How can you calculate the correct resistor for a given frequency? (or is it more a rule of thumb?)
In particular I am concerned with the Sdata, Sclk, Bclk lines. Will 100R do? |
Hi Oli,
I am sorry but your post is most confusing. What clock are you talking about?
The one in the Asynchronous Reclocker or the KWAK-CLOCK? The latter produces a square wave for sure but with an ordinary probe it will look like a distorted sine wave.
The clock in the ASR is kind of sine wave as no comparator is used to square it up. BTW, though a 100MHz crystal is used the frequency of oscillation is about 60-66 MHz. I looked up in the DM74ALS74 datasheet from Fairchild and the maximum clockfrequency is about 34 MHz. So I am afraid this part is not usable in the ASR.
I have tried resistors in clock, data and wordclock lines but did not hear any difference so I stopped using these.
:bawling:
Me using "Maverick" ideas??? Don't think so....:eek: |
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| jewilson |
Elso,
Your correct the ALS according to the TI data book is good for 100MHz clock max, and I bet that really pushing it. |
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| Elso Kwak |
| quote: | Originally posted by jewilson
Elso,
Your correct the ALS according to the TI data book is good for 100MHz clock max, and I bet that really pushing it. |
Huh,
then there is a big difference in max. permissible clock speed between Fairchild and TI.
I looked it up in the TI datasheet. The 100MHz is for the AS part. The ALS part has the same fmax as the Fairchild part. |
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| jewilson |
Elso ,
My mistake, I was looking at the AS part which is 100MHz the ALS part is 34 MHz max.
: :o |
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| Guido Tent |
| quote: | Originally posted by Oli
[B
In particular I am concerned with the Sdata, Sclk, Bclk lines. Will 100R do? [/B] |
Hi Oli
The value is the tradeoff: It defines the slope of the clock / data signal:
- higher slope means (in general) smaller chance of induced jitter
- lower slope means less current generated (also in groundplane)
Less RF current also means lower jitter
I findvalues between 22 ohm and 330 ohm in practice. Audible difference appear, so it might take a while to tweak them
succes |
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| jewilson |
Oli,
If the rise time of the device is two slow that will cause jitter.
I found an article that might help you to calculate the resistor you need. |
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| Oli |
| quote: | | I am sorry but your post is most confusing. What clock are you talking about? |
The asynchronous reclocker Elso.
Interesting that you should hear no difference with resistors in the digital lines- I do want to keep it simple.
Out of curiousity- Are you a ground 'plane' man or a 'star' man? (excuse the pun)
Maverick- Only kidding! |
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| Oli |
Guido,
Cheers for the info.
I feared it would be one of those 'listen to it' choices!
Thinking back to your ground plane theory, I intend to use a number of different power supplies to isolate analogue, digital, PLL and reclocker circuitry.
Q. Do I connect the grounds from these supplies at a single point on the plane?
Q. The idea is to allow return currents to flow to ground, but to avoid 'series type' grounding i.e. digital ground connections between PLL ground and ground supply terminals. This would lead to undesireable potential differences. Ideally each type of circuitry should in in line-of-sight of the ground. Is my understanding correct? |
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| Oli |
Jim,
I'll read through the info- thanks. I'm still deciding whether these resistors are a 'good thing' or not. |
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| Guido Tent |
| quote: | Originally posted by Oli
Guido,
Cheers for the info.
I feared it would be one of those 'listen to it' choices!
Thinking back to your ground plane theory, I intend to use a number of different power supplies to isolate analogue, digital, PLL and reclocker circuitry.
Q. Do I connect the grounds from these supplies at a single point on the plane?
Q. The idea is to allow return currents to flow to ground, but to avoid 'series type' grounding i.e. digital ground connections between PLL ground and ground supply terminals. This would lead to undesireable potential differences. Ideally each type of circuitry should in in line-of-sight of the ground. Is my understanding correct? |
Hi Oli,
Q1: I'd say:
" connect the grounds from these supplies closest to the chip(s) they supply "
However, it depends if you add series beads and / or resistors in the supply lines. If you do that (reccomended) the RF supply currents will be greatly reduced, and so are the ground currents. In that case, it does not matter that much where to connect the grounds of the various supplies involved.
Q2: Understood correctly
cheers |
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| fmak |
However, it depends if you add series beads and / or resistors in the supply lines. If you do that (reccomended) the RF supply currents will be greatly reduced, and so are the ground currents. In that case, it does not matter that much where to connect the grounds of the various supplies involved.
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The Cho Drops in the post earlier are rubbish. I got some samples (they are super quick) and as recommended, connected to both signal and ground lines on a ringing (35MHz) SPDIF signal.
Distorts the wave form totally, removed the RF, but the signal is too poor to lock on! Perhaps they are better for PS lines.
I measured 0.7 uH, 0.9R, and for some reason 4.7 uF! Shall have a look inside one of them.
:smash: |
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| Guido Tent |
| quote: | Originally posted by fmak
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The Cho Drops in the post earlier are rubbish. I got some samples (they are super quick) and as recommended, connected to both signal and ground lines on a ringing (35MHz) SPDIF signal.
Distorts the wave form totally, removed the RF, but the signal is too poor to lock on! Perhaps they are better for PS lines.
I measured 0.7 uH, 0.9R, and for some reason 4.7 uF! Shall have a look inside one of them.
:smash: |
Hey Fred,
You might use them as a decap......
cheers |
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| jewilson |
Fred,
What is a Cho Drops.... |
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| fmak |
| quote: | Originally posted by jewilson
Fred,
What is a Cho Drops.... |
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See post by Oli under p1 |
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| jewilson |
Frank,
I am not sure what you stating here, however to decouple HS logic can take multiple caps including a .1 and .01 and even smaller depending on ringing frequency
Of course there are other thing we can to to improve this. |
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| Oli |
I wonder if I could use the resistor values directly from Guido's example:
The Audio Dac Page
It appears that 1k resistors are used in all 'standard' logic lines.
After the reclocker, the left and right latches use 100R resistors (for higher slew rate)
The clock uses 330R resistor
(compromise between slew rate and noise?)
Would this scheme have more general application? |
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| jewilson |
Oli,
You could but I would use smaller value from the application notes. A value from 50 to 100 ohm will work ok. Also, don't use a Metalfilm reisitor, they are sprial cut with a laser which causes some inductance, which is not good. Use a carbon film in this application. |
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| Oli |
Okay, I'll try a lower value of resistor.... say 100R
Metal film inductive?
In your view is higher thermal noise of carbon film less of an issue? |
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| jewilson |
Oil,
I don't like carbon films for many reasons temp is just one. Just use a carbon film for the digital. |
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| Oli |
Cheers Jim. I'll have to get some carbon film resistors just for the digital lines.
Guido suggests inductance in the supply lines of the digital logic to reduce RF.
Should I use 1mH inductors and ferrites, or is this overkill?
(I am using VHC logic) |
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| jewilson |
| Make you you het sheilded inductors, 1mh might be to much. |
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| Oli |
Shielded?
The ones I have used to date have looked like resistors. |
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| jewilson |
| Some of them are sheilded. check with the vendor. |
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| Oli |
Okay I'll check.
I should be able to thread a ferrite bead on the inductor lead to increase the effectiveness of the RF filter. I'll put it on the IC side of business.
Does this sound reasonable? |
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| Oli |
I just had a thought.... actually 2 questions....
1) Do I really nead inductors- don't the ferrites act as inductors?
(at 100Mhz the 100R impedance of a ferrite looks like the 100R impedance of a 0.16uH inductor- but is this enough?)
2) If I use resistors in the supply lines of my op-amps should I put ferrites on these too? |
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| Petter |
| quote: | Originally posted by Oli
Cheers Jim. I'll have to get some carbon film resistors just for the digital lines.
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May I suggest you consider carbon composition rather than film? Film would be mostly the same as any other film type. Carbon composition is the on which has "special" properties due to the "bulk" method of creating the resistance. I would guess this is what you need to use to achieve the desired effect.
Petter |
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| Oli |
| Thanks Petter! I'll try to source some carbon composition resistors. |
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| Oli |
Here is my latest idea about digital supply decoupling :idea:
- A 0.1uF ceramic capacitor provides localised decoupling.
- A ferrite bead reduces RFI in the supply line.
- OcCon electrolytic provides low frequency decoupling.
- The tendancy of ceramic capacitor and the OsCon to self-resonate is reduced by placing the ferrite bead between them.
See attached file...
Any comments?
Is this good practice? |
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| Oli |
Here is my 'idea' for the analogue supply of my op-amp. Resistors dampen the tendancy of the ceramic capacitors to resonate with the OsCons.
Is this good practice?
Should I use ferrites in the supply lines too?
See attached file... |
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| fmak |
[QUOTE]Originally posted by Oli
[B]Here is my 'idea' for the analogue supply of my op-amp. Resistors dampen the tendancy of the ceramic capacitors to resonate with the OsCons.
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Does this not increase PS impedance? Why need OSCONs for analogue PS, and why place Rs behind low esr cap. Just examine the PS to see if it rings or not! |
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| Oli |
Fair comment.
I could attempt to parallel the ceramic and the Os-Con first and see if it rings.
Again I would still use a ferrite in the digital supply to reduce noise induced in the supply lines by the logic.
and resistors in the supply line of the op-amp to reduce the frequency of circulating RF currents to within the power supply rejection limit of the op-amp.
Does this seem a better arrangement?
Any idea about ferrites in the op-amp supply? |
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| fmak |
I could attempt to parallel the ceramic and the Os-Con first and see if it rings.
Again I would still use a ferrite in the digital supply to reduce noise induced in the supply lines by the logic.
and resistors in the supply line of the op-amp to reduce the frequency of circulating RF currents to within the power supply rejection limit of the op-amp.
Does this seem a better arrangement?
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You could start from the simplest base. Use separate PSs, implememnt good practice on digital supplies. Buils lowest noise and lowest impedance analogue PS. Measure these with a wide band ac volt meter (10 uV full scale minimum,>1 MHz) and also look at the trace using avery wide band scope. You can easily be deceived by a 20 MHz scope!
:cool: |
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| CheffDeGaar |
Oli,
May be you can find useful infos on this thread. A little bit hard to browse through, but quite informative. For ferrite an prefiltering, look at post #7, seems that a three leaded cap (NFM41 from Murata) does a nice job.
Happy bypassing ;) |
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| Petter |
Check out the .3MHz 7 pole filter here :)
Petter |
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| Peter Daniel |
| quote: | Originally posted by Oli
Any comments?
Is this good practice? |
Forget about good practices. Put the caps in the circuit and listen. I will not touch OsCons, as those were the worst sounding caps I tried. BG N type were much better in digital and analog decoupling. I'm using small values at the moment (4.7U) and even those sound much better than all the other caps I tested. |
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| Jaka Racman |
| quote: | | BG N type were much better in digital and analog decoupling. |
That is exactly my experience. But you have to dip them into snake oil three nights before the full moon.
Best regards,
Jaka Racman |
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| Peter Daniel |
| quote: | Originally posted by Jaka Racman
That is exactly my experience. But you have to dip them into snake oil three nights before the full moon.
Best regards,
Jaka Racman |
That is exactly a type of comment I would expect from a design engineer. |
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| Jaka Racman |
| quote: | | That is exactly a type of comment I would expect from a design engineer. |
Seems you never actually listened to snake oil dipped caps.
Best regards,
Jaka Racman |
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| Oli |
I have been doing some reading and thinking...
1) Regarding resistors in the digital signal line: Are 'low inductance' resistors needed?
We are already imposing slew rate limitations due to the resistor acting together with the input capacitance of the IC. Is the inductance significant?
2) Do I need to decouple digital ICs with Os-Con and ceramic capacitor in parallel?
Will the inductance of the tracks dominate such that the ceramic will be ineffective in practice and that the Os-Con will do 99% as good a job? I believe Guido Tent makes such a claim in his publication on 'decoupling digital ICs'.
Comments? |
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