VAS with CD-CB stage

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I've used this VAS in several production amplifiers around 1995-1997 and thought it would be useful to share this idea and to see if that arrangement have been used before - perhaps somebody would remember. The idea is to connect a common drain into a common-base stage, effectively creating a voltage to current convertor. Advantages are - good speed and linearity, completely symmetrical voltage and current limiting on the output, high OL gain in a 2 stage amplifier. On the first diagram here is a simplified configuration, on the second - a complete and known to work circuit with BJT output. However I've used this VAS with MOSFET output stage as well.

x-pro

P.S. - transistor types on the second diagram I had to choose from available models to get the simulation to work. However BC550/BC556 for small signal, BD139/140 (Philips) in place of MJE15030/31 and 2SC2922/2SA1216 in the output were originally used. P-channel MOSFET could be ZVP3306, ZVP3310 or similar.
 

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AKSA said:
Looks good, neat constant phase circuit, very high bandwidth which would have to be tamed to meet Bode/Nyquist criteria, but is there really an advantage in using a Pmos, why not a bipolar?

Pmos gives the VAS an extremely high OL gain - over 120 dB into 10K load without much complications, and very good linearity, as it is essentially a voltage to current convertor working on a small part of the MOSFET transfer curve. As the gain in the first stage is high, the distortion are mainly 2-nd and lower 3-rd harmonics from the MOSFET, and even these are at a very low level.

AKSA said:
How does it sound? Soundstage? Fine detail? Low distortion?

It sounds good :) . I've used this VAS configuration in 5250 integrated amp and A52/A52SE power amplifier from Creek Audio (thought in A52 I've made the input diff. stage from a matched and cascoded JFET pair and the output was N-ch MOSFETs on both) and another good example of this VAS was A3i amplifier from Cambridge Audio which I've designed about the same time, using BJT output transistors (from Sanken). All these amps had a very good sound (IMHO).

Cheers

Alex
 
AKSA said:
Adam is right; it mimics the LTP input stage, which is an emitter follower feeding a common base connection.....

Yes and no :) . It looks like an LTP, however the input impedance of the BJT in CB configuration is much lower that the output impedance of MOSFET in CD at about the same current. Because of this imbalance the output impedance of the BJT goes higher, the transfer curve looks like a single-ended FET stage and as the voltages on the FET are not changing much - quite a linear stage too.

Cheers

Alex
 
Greetings Alex,

You are a sleeper - an ex-Creek designer, I had not realised.

No bloody wonder.....

I always try to design the VAS with a naturally falling FR to help with compensation. To this end bootstraps are useful, so is the common emitter configuration. Your use of common base, driven in common source at a very high impedance gate (yielding very high gain for the input stage), would appear to give stratospheric top end, very little phase shift (good), and 120dB OLG into 10K (current dependent of course) is also very good.

What distortion is introduced would be presumably low order, particularly H2/H3 from the mosfet as its current would vary very slightly.

What more can be said? It's very good..... congratulations!

Cheers,

Hugh
 
AKSA said:
Your use of common base, driven in common source at a very high impedance gate (yielding very high gain for the input stage), would appear to give stratospheric top end, very little phase shift (good), and 120dB OLG into 10K (current dependent of course) is also very good.

What distortion is introduced would be presumably low order, particularly H2/H3 from the mosfet as its current would vary very slightly.

Your analysis is quite correct (thought it is common drain for the MOSFET).

Thank you!

Alex
 
Bonsai said:
Alex, in your circuit, I see C4 and C7 which are effectively capacitice shunts to ground, and then the same again with the C3+R13 network. What effect do these have on the OL gain response? Are these not heavy loads to tame the loop response?

These are required to get the stability margin. They do not affect the gain below about 1 kHz and not really heavy loads (C4, C7 are in the range of input capacitance of the output stage anyway) .


Bonsai said:
Very interesting VAS topology BTW.

Thank you!

Alex
 
AKSA said:
I always try to design the VAS with a naturally falling FR to help with compensation. To this end bootstraps are useful, so is the common emitter configuration. Your use of common base, driven in common source at a very high impedance gate (yielding very high gain for the input stage), would appear to give stratospheric top end, very little phase shift (good), and 120dB OLG into 10K (current dependent of course) is also very good.

What distortion is introduced would be presumably low order, particularly H2/H3 from the mosfet as its current would vary very slightly.

What more can be said? It's very good..... congratulations!

Cheers,

Hugh
That from Aksa is quite a compliment. You must be smiling.
 
Hi,
is there a capacitor missing after R17 or does C8 (100nF) do this at the current levels here?

C3, C6 & C14 form the normal compensation expected in lieu of the Miller comp cap omitted around M1. Does C2 assist here?

I note your use of C5 across Q5, but not across Q4, why?
 
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Alex,

looking at your circuit, I guess there are probably a few other ways to compensate this amp - did you consider omitting the 100pf caps and setting the front end response with a larger value of C6? I imagine at high frequencies those 100pf caps (=circa 200pf to gnd) become quite a load.
 
AndrewT said:
Hi,
is there a capacitor missing after R17 or does C8 (100nF) do this at the current levels here?

C8 is just a decoupling for a zener D3, and 100nF is enough there from my experience.

AndrewT said:
C3, C6 & C14 form the normal compensation expected in lieu of the Miller comp cap omitted around M1. Does C2 assist here?

There could be no Miller cap around M1 as it is a common drain stage - i.e. drain is AC grounded and it is non-inverting. I would not call it a source follower as it loads into a very low impedance of the following common base stage and can not "follow" anywhere :) . C2 is again just a cap across D2, providing noise filtering and AC decoupling.

AndrewT said:
I note your use of C5 across Q5, but not across Q4, why?

There is (almost) no signal voltage across Q4, however there is across Q5 and C5 somewhat improves the stability.

Cheers,

Alex
 
Bonsai said:
Alex,

looking at your circuit, I guess there are probably a few other ways to compensate this amp - did you consider omitting the 100pf caps and setting the front end response with a larger value of C6? I imagine at high frequencies those 100pf caps (=circa 200pf to gnd) become quite a load.

The need for this caps is proven in practice :) . I 've shown a real-world circuit. As I've said earlier the output stage input capacitance is about the same order of magnitude. With 10mA available and 300 pF load it makes 30V/us which is enough. Real value of these caps could vary from 33 to 100pF depending on the transistors used. For BD140/139 in the VAS and driver stage 68 pF each would be enough.

Cheers

Alex
 
Alex

I always liked the way you use protection diodes.
Here, it seems that without D1 (1n4148) p-mosfet would 'go to heaven' at negative clipping or slewing, right?
How about anti saturation diodes of VAS? Such designs do not suffer from phase reversal, but are you sure the ati saturation diodes are not needed?

regards
Adam
 
darkfenriz said:
Alex

I always liked the way you use protection diodes.
Here, it seems that without D1 (1n4148) p-mosfet would 'go to heaven' at negative clipping or slewing, right?

Correct.

darkfenriz said:
How about anti saturation diodes of VAS? Such designs do not suffer from phase reversal, but are you sure the ati saturation diodes are not needed?

Not that much from my experience :)

Cheers

Alex
 
Here is a simulation result of what this circuit possibly capable of without a (relatively) slow output stage. I've added a class A biased PP output. FFT result for the circuit below is for 20kHz 70V p-p output into 1K load (levels are relative to 0dB at 20kHz). I suspect that in real life the distortion would be much higher but even if the simulation is off by 20 dB it would be a fairly good result :) . At 1 kHz 70V p-p simulated distortions are -138dB 2nd and -128dB 3rd.

It looks like a good opamp type circuit for a preamp stage. Perhaps I should bulid one just for fun... .

Cheers

Alex
 

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Alex,

Impressive....

I've just had a thought concerning this comment:

the input impedance of the BJT in CB configuration is much lower that the output impedance of MOSFET in CD at about the same current.

Zin of the BJT would be close to re, that is around 2.5R, and Zout of the mosfet would be recip gm, 40R for the ZVP1320F which has gm of 25mS.

Alex, since we are opeating at such low resistances where noise is no issue, would it be possible to use a PNP bipolar in place of the fet and simply interpose a 33R resistor between the two emitters?

With the superior gm of the PNP we would have very little error signal generated between its base and emitter, less than the fet, and the 33R resistor would swamp the non-ohmic Zout (again, 2.5R at 10mA) yielding far superior linearity.

While there would be a 70% voltage division with the 33R/82R resistors, the advantages would be similar OLG but superior linearity - and likely with some intrinsic damping making it easier to compensate.

Your thoughts? Nyet?

Hugh

Andrew - I always give praise where it is due! It is a privilege to see and talk with some of the great minds in this forum, though these days I'm not exactly didactic in light of the obsession I see with math and measure.....
 
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