I have been spending some time experimenting with Thermal Trak biasing and temperature compensation using LTSpice. I decided to start a new thread as the original Thermal Trak thread has branched in multiple directions.
Right away let me say that I understand that the results are only as good as the models. However I think that the process can provide valuable insight and provide at least a starting point for a physical implementation.
I started by looking at a circuit posted by Bob Cordell, dated Jan 24, 2009. This uses Andy C's modified versions of the Thermal Trak transistors and diodes, intended to better match the real temperature coefficients of the devices. I evaluated the temperature response by stepping the temperature in 10C increments from 20C to 150C and running .op at each temp. A graph of the current in the emitter resistors shows 70mA at 20C increasing to 195mA at 150C. (See attached zip folder with LTspice schematic and models.) If the temperatures of the Vbe multiplier, predrivers, and drivers are fixed at say 30C and just the outputs have varying temperature, the emitter resistor current goes from 104mA at 20C and declines quickly to just a few mA.
So either I am missing something, or this circuit doesn't do a good job of compensating over temperature. And believe me, I hesitate to question someone who knows far more about this topic than I do!
Another thing I noticed is that the change in Vbe with temperature given by the Fairchild model for the 2SC3503 transistor used as the Vbe multiplier is -0.8mV/deg C which seems very low - I would expect around -2mV/deg C. Again, accuracy comes back to the models.
I decided to try to develop a thermal compensation scheme that would keep the bias current as stable as possible over temperature. First I went back and re-read the sections in Douglas Self's book on the topic, and then went to work with LTSpice. To be continued...
Right away let me say that I understand that the results are only as good as the models. However I think that the process can provide valuable insight and provide at least a starting point for a physical implementation.
I started by looking at a circuit posted by Bob Cordell, dated Jan 24, 2009. This uses Andy C's modified versions of the Thermal Trak transistors and diodes, intended to better match the real temperature coefficients of the devices. I evaluated the temperature response by stepping the temperature in 10C increments from 20C to 150C and running .op at each temp. A graph of the current in the emitter resistors shows 70mA at 20C increasing to 195mA at 150C. (See attached zip folder with LTspice schematic and models.) If the temperatures of the Vbe multiplier, predrivers, and drivers are fixed at say 30C and just the outputs have varying temperature, the emitter resistor current goes from 104mA at 20C and declines quickly to just a few mA.
So either I am missing something, or this circuit doesn't do a good job of compensating over temperature. And believe me, I hesitate to question someone who knows far more about this topic than I do!
Another thing I noticed is that the change in Vbe with temperature given by the Fairchild model for the 2SC3503 transistor used as the Vbe multiplier is -0.8mV/deg C which seems very low - I would expect around -2mV/deg C. Again, accuracy comes back to the models.
I decided to try to develop a thermal compensation scheme that would keep the bias current as stable as possible over temperature. First I went back and re-read the sections in Douglas Self's book on the topic, and then went to work with LTSpice. To be continued...
Continuing -
I settled on an approach of creating an ideal model of the bias voltage generator using spice primitives. The idea is to have two slopes: one for the predrivers and drivers implemented with a Vbe multiplier, and one for the outputs implemented by the ThermalTrak diodes plus whatever adjustment network.
The idle, steady state bias is set by a voltage source (V4.) The Vbe multiplier is modeled using a voltage controlled voltage source (E2) that is driven by a voltage equal to temperature from V5. Actually, (temp-30)/1000 so that 30C is the baseline point and the gain of E2 is expressed directly in mV/deg C to get rid of the decimal points. The ThermalTrak diodes are modeled in a similar way by E3. The rest of the circuit is the same as Bob Cordell's original, though the transistor types are different because I happen to have them on-hand.
See the attached LTspice file. The process is explained in the comments, repeated here:
----------------------
Determination of thermal compensation slopes for bias adjustment using a Vbe multiplier for predrivers and drivers, and ThermalTrak diodes for the output drivers.
The concept is that the Vbe multiplier, predrivers, and drivers are isothermal, and at a different temperature from the outputs. V5 produces a voltage proportional to temperature (divided by 1000 so gain of E2 and E3 is in mv/degC) which is multiplied by the gain of E2, modeling a Vbe multiplier changing the bias voltage with temperature.
The ThermalTrak diodes plus associated adjustment network (modeled as E3)
compensates for changes in the temperature of the output pair.
1) Set idle condition - assume 30C
a) set gain for E2, E3 = 0
b) fix temp of Qouts to 30C
c) adjust V4 for I(R8) = 107mA at 30C: V4=3.875V -> 107.098mA
2) Determine slope of thermal compensation for predrivers and drivers:
a) keep E3=0 and temp of Qouts at 30C
b) adjust gain for E2 to keep I(R8) nearly constant over temp: -7.72
3) Determine slope of thermal compensation for outputs:
a) remove fixed temp on Qouts
b) set gain of E2 = 0
c) fix temp of Qpres, Qdrivers to 30C
d) adjust gain for E3 to keep I(R8) nearly constant over temp: -3.8
4) Test entire solution
a) remove fixed temp on Qpres, Qdrivers
b) set gain of E2 as determined in 2b
c) set gain of E3 as determined in 3d
Result: I(R8) goes from min of 105.455mA (60C) to max 125.603mA (150C)
Bias voltage (V4): 3.875V (at 30C)
Vbe multiplier slope (E2): -7.72mV/deg C
TTrak diodes slope (E3): -3.8mV/deg C
To set the temperature of a component to a fixed value, ctrl - right click the component, then add "temp=50" (or whatever temp you want) in the Spice Line 2 entry. Check the box to make it visible on the schematic so you don't forget that it is set.
---------------------------
Comments so far?
I settled on an approach of creating an ideal model of the bias voltage generator using spice primitives. The idea is to have two slopes: one for the predrivers and drivers implemented with a Vbe multiplier, and one for the outputs implemented by the ThermalTrak diodes plus whatever adjustment network.
The idle, steady state bias is set by a voltage source (V4.) The Vbe multiplier is modeled using a voltage controlled voltage source (E2) that is driven by a voltage equal to temperature from V5. Actually, (temp-30)/1000 so that 30C is the baseline point and the gain of E2 is expressed directly in mV/deg C to get rid of the decimal points. The ThermalTrak diodes are modeled in a similar way by E3. The rest of the circuit is the same as Bob Cordell's original, though the transistor types are different because I happen to have them on-hand.
See the attached LTspice file. The process is explained in the comments, repeated here:
----------------------
Determination of thermal compensation slopes for bias adjustment using a Vbe multiplier for predrivers and drivers, and ThermalTrak diodes for the output drivers.
The concept is that the Vbe multiplier, predrivers, and drivers are isothermal, and at a different temperature from the outputs. V5 produces a voltage proportional to temperature (divided by 1000 so gain of E2 and E3 is in mv/degC) which is multiplied by the gain of E2, modeling a Vbe multiplier changing the bias voltage with temperature.
The ThermalTrak diodes plus associated adjustment network (modeled as E3)
compensates for changes in the temperature of the output pair.
1) Set idle condition - assume 30C
a) set gain for E2, E3 = 0
b) fix temp of Qouts to 30C
c) adjust V4 for I(R8) = 107mA at 30C: V4=3.875V -> 107.098mA
2) Determine slope of thermal compensation for predrivers and drivers:
a) keep E3=0 and temp of Qouts at 30C
b) adjust gain for E2 to keep I(R8) nearly constant over temp: -7.72
3) Determine slope of thermal compensation for outputs:
a) remove fixed temp on Qouts
b) set gain of E2 = 0
c) fix temp of Qpres, Qdrivers to 30C
d) adjust gain for E3 to keep I(R8) nearly constant over temp: -3.8
4) Test entire solution
a) remove fixed temp on Qpres, Qdrivers
b) set gain of E2 as determined in 2b
c) set gain of E3 as determined in 3d
Result: I(R8) goes from min of 105.455mA (60C) to max 125.603mA (150C)
Bias voltage (V4): 3.875V (at 30C)
Vbe multiplier slope (E2): -7.72mV/deg C
TTrak diodes slope (E3): -3.8mV/deg C
To set the temperature of a component to a fixed value, ctrl - right click the component, then add "temp=50" (or whatever temp you want) in the Spice Line 2 entry. Check the box to make it visible on the schematic so you don't forget that it is set.
---------------------------
Comments so far?
Adding plots of emitter resistor current vs. temp for the various circuits
Bob Cordell's Jan 24 2009 circuit
bias generator modeled with spice primitives (ThermalTrakBias3 circuit)
bias generator real circuit (ThermalTrakBias4 circuit)
Bob Cordell's Jan 24 2009 circuit
bias generator modeled with spice primitives (ThermalTrakBias3 circuit)
bias generator real circuit (ThermalTrakBias4 circuit)
Attachments
Hi mightydub
I’m not using LTspice, so could you please post the circuit as jpg or pdf files, with the currents and voltages?
Could you also post the models you are using for the TT diodes?
Cheers
Stinius
Ok - here's .jpgs of the schematics, and a .txt of the .op results for each at 30C, with the graphs repeated. Models for the TT diodes are in the .zip with the first post.
First, Bob Cordell's circuit:
First, Bob Cordell's circuit:
Attachments
has it really been 6 years! Unfortunately no, I have a design using this idea that is ready to go, pcb layout done, just need to order boards and parts but life got in the way and hobbies haven't had much attention. I would love to hear results if someone tried this out. I think the basic idea has merit, of course the actual slopes will no doubt be different.
Toni (ASTX) recently noticed that the LTSpice model of the 2SC3503 had an error, EG should be 1.1
EG determines the temperature coefficient so this explains your observation in the first post of an anomaly for this transistor.
EG is an inherent property of Silicon and varies very little so this is not some idiosyncrasy of the 2SC3503, and Toni confirmed this with tests on an actual sample circuit.
Any simulation would need to use the correct value to be useful.
I haven't checked if the complement transistor is faulty too.
Well spotted to you and Toni
Best wishes
David
Last edited:
The main aim is to match the bias to keep the point of cross over distortion out of the loop.
Some sort of matched feedback loop is required to keep the bias exactly right.
Over shooting will reduce bias too much.
Under shooting wont reduce bias enough.
Sounds like a job for a PID controller.
Some sort of matched feedback loop is required to keep the bias exactly right.
Over shooting will reduce bias too much.
Under shooting wont reduce bias enough.
Sounds like a job for a PID controller.
Toni (ASTX) recently noticed that the LTSpice model of the 2SC3503 had an error, EG should be 1.1
EG determines the temperature coefficient so this explains your observation in the first post of an anomaly for this transistor.
EG is an inherent property of Silicon and varies very little so this is not some idiosyncrasy of the 2SC3503, and Toni confirmed this with tests on an actual sample circuit.
Any simulation would need to use the correct value to be useful.
I haven't checked if the complement transistor is faulty too.
Well spotted to you and Toni
Best wishes
David
Your post inspired me to dust off the simulations and take a look - you are correct! Changing EG to 1.11 flips the result from bias current increasing with temperature to decreasing.
I downloaded newer models for the 3503 and 1381, interesting to see that even the updated model for the 3503 has EG= 0.84:
************ Power Discrete BJT Electrical Parameters ***************
** Product: KSC3503DS
** Package: TO-126
**-------------------------------------------------------------------
.MODEL KSC3503DS NPN
+ IS=3.510E-14 BF=174.09 VAF=600
+ IKF=0.12325 ISE=2.2538E-13 NE=2.0
+ BR=0.64499 VAR=100 IKR=0.43102
+ ISC=6.4644E-10 NC=1.5 RE=0.048
+ RC=0.815 RB=8.134 RBM=0.034
+ IRB=3.0e-6 CJE=8.10E-12 MJE=0.401
+ VJE=0.75 CJC=8.20E-12 MJC=0.31
+ VJC=0.75 TF=9.995E-10 XTF=2
+ VTF=35 ITF=1 TR=1.0E-8
+ EG=0.84 XTB=2.5 FC=0.5
**-------------------------------------------------------------------
** Creation: Sep.-01-2011 Rev: 0.0
** Fairchild Semiconductor
As I said in the original post, results depend on the accuracy of the models and it looks like thermal accuracy was not a priority for this model. But that only affects the first circuit. I still think that developing independent thermal compensation for the predrivers+drivers and outputs makes sense.
Nigel, the problem I see with using a PID controller is how to measure the bias current, that is only possible with no input. Using temperature as the feedback term, taking advantage of the damping from the thermal mass of a heatsink, and using the thermal characteristics of a PN junction is quite elegant.
I hope that is not a surprise
That's bad. EG is in an exponent factor so the difference between 0.84 and 1.1 is substantial
Some of the other values look a bit curious too.
To me too, and also like you, I have played around with this in simulation but not built it yet, still not quite satisfied.
Best wishes
David
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