CS8420 serial in-> spdif out.

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CS8420 serial in-> spdif out.

Nice forum!

I am trying to realize a "state of the art" home cinema and dvd audio system.
Key is to run all channels trough separate dacs. My thinking is to use 3 CS8420 in hw mode 2 and tap into the digital 3; 2 ch feeds in the dvd and output 3 spdif 24/96 to run the dacs.

I've done a first run at this but it did not work, I tested both the av reciever and dvd trying out all formats without even getting the pll to lock.

I am not sure if I ****ed up the connections on the chip (cant find anything wrong though) or if copy protection issues are playing games with me...
Do any of you have any experiance of the 8420 running in hw mode 2, if so any advice you can offer? I am particiraly confused about the copy settings.
 
A AV reciever or a dvd with built in decoders will decode the AC3 or DTS and output 3 separate 2 ch datastreams, all synced to one word and bitclocks so that the dac chip will understand the signals.

I am trying to pick the signals just before they enter the digital filter or integrated dac chip as in a cd player but with 3, 2 channel data streams and up to 24bits and 96kHz.

I then take these and feed THREE CS8420 in hw mode 2 to get the 3 spdif strems to run 3 separate dacs and get 6 channels, L,R, SR, SL, C and sub.

Reading the data sheet of the 8420 it should work.....
 
if the dacs run in hardwaremode, you could find out how they are configured. then you schould configure the 8420 exactly the same. then the serial input should work propperly. in hardwaremode 2 you are using the src. to wich samplerate do you convert your signal? you have to apply a masterlock to OMCK defining the output samplerate. it has to be 256*fs. the c&u bits are don`t care. And one problem is the reset. you have to apply a defined reset after startup!

good luck
 
That would be great, I'll see what I can scan and post.....
Just rechecked the curcuit and the only options (beside the c and u stuff and formats) are the startup options which I have set as follows; SDOUT->pulled down=serial output is slave, LOCK->pulled up=TCBL is output.


BTW I am doing the testing on a pioneer reciever with a Motorola 56362 processor and a integrated dac chip from Cirrus CS4226 all contolled by sw ie cant get to the formats without testing
:mad:
 
Just tested the curcuit in a AD converter and it works:nod:

I must have missed something on the 4226 set up in the reciever.
When setting up the 8420 in the DD reciever I never even get pll lock indicator to indicate signal.
In the AD converter I get the pll to look even on wrong formats.

I have attached the 4226 part of the reciever schematics, I pick the signals of pin 34, 37 and 38 and let the input recovered clock clock the output of the 8420.

Whats wrong:scratch:
 

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perhaps it it usefull to apply a masterclock to omck. if you take the recovered clock, the device will not start up correctly, because ther is an initialisation routine configuring the device. i think this routine does not start because tere is no valid clock, perhaps rmck is an input or tree state at startup and it never intializes itself. try to connect the signal of pin 31, it should be the masterclk of the cs4226 or better an oszillator with 24,564 Mhz.
-->96KHz

good luck
 
Thx Achimek!

You were spot on....I feel a bit stupid for missing it.
Anyway it works perfect and for those considering doing the same, the motorola dsp talkes to the Cirrus dac chip through I2S in all formats DD, DTS and PCM in my pioneer AV Reciever.

Just hoping I am not loosing any bits:confused:
 
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