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zilog 14th February 2007 10:02 PM

winding technique of current sense transformers
 
I want to design a toroidal current sense transformer where primary current will average 20A, and peak up to 150A. The turns ratio should be 1:100, and it will be loaded with 0.82 or 1 ohm. The operating frequency will be 55kHz push-pull, with a dead time of 0.1T, providing ~9uS pulses across the CT primary. My calculations lead to a very small core with numbers: Ae_min = 1.36mm^2, AL_min = 0.9nH/n^2. I got the latter number assuming 10% magnetizing current while measuring 1A primary current => min L_sec=9.1uH@100 turns. The 3F3 material looks nice with its relatively high premeability and frequency response up to a few MHz, is this a good choice?

This is a fairly small toroid, and I want it to be small, the problem is that I want to wind it using 0.3mm wire to handle the secondary current which requires quite a large toroid if 100 turns is to be squeezed in one single layer. I wonder, is there any technique that doesnt cause too high interwinding capacitance and still allows me to wind this in many layers, say using a core with 4 or 6mm inner diameter?

Elvee 15th February 2007 08:01 AM

Hi Zilog,

Considering the levels of impedance you work with, I don't think capacitance will be much of a problem; let's say you want an accuracy 1000X better than the pulse you have to measure. This is 9ns; with 1ohm, this allows you 9nF of parasitics; unlikely.
What would bother me more are the inductive aspects: 9H with 1ohm gives 9s, much too low in my opinion: you will distort severely the waveshape.
I 'd personnaly choose a very large material specifically intended for this type of application: T38 or T46 from Epcos f.e.:
http://www.epcos.com/web/generator/W...F_SIFERRIT.pdf
Philips also certainly has similar materials.
And increasing the number of turns to 150 or 200 could also certainly help. You'd need to make the winding in a very homogenous fashion to avoid any leage inductance, but the number of layers is certainly not an issue.
LV

zilog 15th February 2007 08:24 AM

What about 3E25? It has the highets permeability I can get my hands on easily here. One thing I dont understand is how the loss-versus-frequency graph works, I guess loss implies some perceived resistance in the windings?

This is what I have to choose between ->
http://www.elfa.se/elfa-bin/dyndok.p...ok=2011480.htm

What minimum value of secondary side inductance should I aim for? Say I use the TN 13/7,5/5 @3E25 with 1:100 turns ratio, this gives a secondary side inductance of 28.1mH, Shouldn't distort the sawtooth too much? The maximum flux density in this core should stay very low aswell assuming that my maximum D=0.9 allows the core to reset between current pulses (one CT will be common for a push-pull stage).

I want to use some kind of snubbers across the transformer, how is it recommended to place the CT, between the return of the snubbers and the transformer, on the sources of the NFETs or between the storage capacitors and the center tap of the transformer? I guess I could place it after the snubbers, ignoring their returned current as my A-CMC scheme only gets the rising current waveform from the CT, and synthesizes the falling waveform using other measures.

Elvee 15th February 2007 11:53 AM

Quote:

Originally posted by zilog
What about 3E25? It has the highets permeability I can get my hands on easily here. One thing I dont understand is how the loss-versus-frequency graph works, I guess loss implies some perceived resistance in the windings?
The iron losses in ferrites behave more or less like a parallel damping resistor; but in your case, it will only have a negligible effect due to the low impedance of the system.
Quote:

What minimum value of secondary side inductance should I aim for? Say I use the TN 13/7,5/5 @3E25 with 1:100 turns ratio, this gives a secondary side inductance of 28.1mH, Shouldn't distort the sawtooth too much? The maximum flux density in this core should stay very low aswell assuming that my maximum D=0.9 allows the core to reset between current pulses (one CT will be common for a push-pull stage).
To avoid too much droop, etc, a time constant L/R of ~10 times the pulse duration is OK, in your case, around 100H.
But you have to understand that no DC component will be able to pass through your transformer; the waveshape will be preserved (provided no saturation occurs), but the reference line will be lost. Suppose you operate at a d=9:1; you will see the overall peak to peak value of the current, but instead of having the bottom of the off time pulse resting at 0V, it will go deeply negative, whilst the on part of the waveshape will only be slightly positive: this is necessary to keep the volt.second product of the positive side equal to that of negative side.
If you want t derive the absolute value of the current independent of the duty cycle, you'll have to use some kind of DC restoration or a similar trick.
Quote:

I want to use some kind of snubbers across the transformer, how is it recommended to place the CT, between the return of the snubbers and the transformer, on the sources of the NFETs or between the storage capacitors and the center tap of the transformer? I guess I could place it after the snubbers, ignoring their returned current as my A-CMC scheme only gets the rising current waveform from the CT, and synthesizes the falling waveform using other measures
It is probably preferable to exclude the snubber current from the CT as it will bring no information but ringing instead.

If you want to check that your core doesnt saturate, here is a little formula of mine you'll find printed nowhere:
Induction B=L*I/(n*A) L= inductance of the winding, I= max current, n=number of turns, A= effective area of the core.
LV

Eva 15th February 2007 12:25 PM

Have you considered other arrangements? Sense transformer resetting may not be accomplished properly with such a short dead time.

Some ideas that you may consider:

- Cascading two 10:1 sense transformers makes winding much easier, although winding capacitance is not much of an issue when you are dealing with high currents and a 1 ohm load impedance.

- Using two sense transformers, one in each push-pull leg, allows operation at full duty cycle without improper resetting issues.

- Using a small shunt in the 0.0005 ohm range, which may be a piece of PCB copper plane or a piece of wire, allows to get rid completely of current sense transformers. Furthermore, a lot of J-FET op-amps (like the industry standard TL071) allow their inputs to be driven at +Vcc potential or even above that without malfunctioning. That's very useful when it comes to amplify the signal from shunts placed in the upper supply rail.

zilog 15th February 2007 02:52 PM

I think I have a plan now, I design the initial prototype with twin CT:s, and if it works, then I will try with a single one just to see whether it works or not.

zilog 19th February 2007 05:26 PM

I have a few concerns regarding the catch resistor and the diode for this application. I dont want a too low value of the resistor before the diode, as this will cause non-linear effects to the voltage developed across the resistor after the diode. I want the thing to survive self-resetting from spikes of 150A, that is 1.5A on the secondary side. Am I correct to assume that this CT will swing to -1500V during turn-off since I use a 1k catch resistor? How is this usually handled, catch resistors with a value of 200 ohm or the similar? extremely high voltage diodes seem to be quite slow :/

FastEddy 19th February 2007 05:32 PM

You all may have already seen these handy calculators ... some useful switching supply calculators as well as all manner of inductor v. capacitor calculators ... and some op-amp gain / resistor estimaters.

http://www.daycounter.com/Calculators/

:smash:


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