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Old 8th January 2007, 11:23 AM   #1
zilog is offline zilog  Sweden
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Default what happens when current mode push-pull goes discontinuous?

I am designing an average current mode push-pull smps with +-45V secondaries, close to what my d-amps can tolerate. I cannot guarantee that the amplifiers I will power with it will consume power at all times (low idle current, spontaneous shutdown etc), and the smps will therefore at times go continous.

What adverse effects does this have, what will happen to the output voltage? Is it something I even need to care about? If I am to avoid discontinous mode, giant filter inductors are required, something not too practical with my output current (600W tops).

The current LC output filter has a 9-10 dB resonance peak at no load, but has fallen off to -50 dB at the switching frequency. Will this cause any problems? Cant seem to find any more lossy capacitors, guess I've gotta resort to adding external resistance to solve this otherwise.
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Old 10th January 2007, 10:54 AM   #2
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Won't the resonance be damped by the current mode control?

Btw, is this a car supply or is it off-line? Real push pull or bridge?
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Old 10th January 2007, 11:01 AM   #3
zilog is offline zilog  Sweden
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Quote:
Originally posted by megajocke
Won't the resonance be damped by the current mode control?

Btw, is this a car supply or is it off-line? Real push pull or bridge?

Push-pull car-amplifier operating from 10-16V. Btw it seems as literature hints of discontinous mode being of no concern if I use average current mode control with slope compensation.
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Old 10th January 2007, 11:53 AM   #4
Eva is offline Eva  Spain
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Discontinuous mode at low loads in a circuit designed for continuous mode has the only disadvantage of lower open loop gain that theoretically translates into slightly worse regulation. Anyway, you should design the output filter for minimum output ripple rather than for a wide continous mode range.

Are you sure that you are not mistaking average current mode and peak current mode control?
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Old 10th January 2007, 12:24 PM   #5
zilog is offline zilog  Sweden
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Eva,

Could you please shed some light on how to design the feedback loop(s) for my push-pull average CMC circuit, I have studied various unitrode documents day and night for the last week but I get nowhere. What I need to learn is how to make bode/phase plots of the open loop response, and how to compensate these.

I know what gain/phase margin I want to attain, but I have no idea on how to reach there for a two-loop system. I have studied regular one in-one out control theory many years ago, but I have never touched anything that involves more than one control loop, or PWM for that matter.

1: I cant figure out how to model error amplifier output to output capacitor voltage/current transfer function though I have managed to model the pole and zero that arise from Ro//Co and Co-ESR in the output filter.

2: I dont know what gain I should give current and voltage loops respectively, I feel I need an example that applies to my circuit here.

Please help me as I am really stuck here.
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Old 10th January 2007, 05:51 PM   #6
cerrem is offline cerrem  United States
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Can you provide the chip your using???
What switching frequency are you at???
Depending on the chip, you can limit max duty cycle..ect..ect...
With the feedback loop... First you need to determine if your chip is using a transconductance (gm) amp or if it is a standard Op-Amp...
If you are using Current mode Push-Pull... I prefer to use a TYPE-2 ERROR AMP configuration for this....
Be carefull with those old Unitrode books....they are too simplistic and have seen a million errors in those handbooks...
I would stay clear of those Unitrode books....ony because they will lead you to make a large cumbersome SMPS with 80's to early 90's technology....
As Eva mentioned....you are most likley using "Peak" current mode control....
Chis
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Old 10th January 2007, 06:17 PM   #7
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Quote:
Originally posted by cerrem

Be carefull with those old Unitrode books....they are too simplistic ......
I would stay clear of those Unitrode books....ony because they will lead you to make a large cumbersome SMPS with 80's to early 90's technology....
Chis
Put it in context....Those quotes aren't exactly a tribute to Lloyd Dixon who got alot of this SMPS stuff rolling.....I've got all the references on my shelf...Far worse for problems was the shambles that Unitrode created of the phase shifted control and this was done by other unitrode authors.

If you say "say clear of those books" Can you suggest other books ????

richj
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Old 10th January 2007, 06:18 PM   #8
zilog is offline zilog  Sweden
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I am using the LM5030 chip because this is the only CMC chip that accepts the automotive input voltage range and is available for me to buy easily.

I thought that slope compensated peak current mode control was average current control as the duty cycle variations on peak
-to-average ratio gets sorted out?

My current setup operates at 80kHz (160k clock), has 10-16V input range and a 3:19 turns transformer to allow +-45V after regulation and minimum input voltage with transistor drops of 0.5V etc. I want the duty cycle limited to 80% (40%). The output filter is 25uH per rail with 1360uF@[10.5-31.5]mohm ESR depending on temrerature. I plan to take feedback from both rails through some compensated TL431 feeding an opto coupler, that is to regulate the output voltage to 90V.

The output current is supposed to be in the range 0-6.6A, thus loading the primary switches with 97.6A peak why I have chosen 1:100 turns ratio for the CT parallell with a 0.41 ohm sense resistor to allow Vcs+slope compensation of 0.09V at the end of each cycle equal 0.5V to trip overcurrent protection at 100A primary current.

With my limited knowledge I have calculated the gain from error amplifier output to Vo to be 38.5A/V, and Vo/Vcs = 525 for Io=6.6A and rising for lighter loads.

The first pole of the system is from Co//Ro, and is 0-8.6Hz for my loads, the first zero is from capacitor ESR, and is 3715-11145Hz depending on temperature.

Now I dont really know what to do with this, I guess I want to have a compensated system that crosses at some point and at some phase margin, but I really would like someone to point me to how/what etc here.

Further, I want to know how to design the loop to function with a zener diode in the feedback loop as an TL431 does not accept more than 36V and I need 90V, guess the system should have the same control parameters, just shifted in voltage, say 80V zener drop and using the control system to behave as it has a 10V secondary with the same outout resistance as I have calculated for the full-voltage system?
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Old 10th January 2007, 07:39 PM   #9
cerrem is offline cerrem  United States
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Quote:
Originally posted by richwalters


Put it in context....Those quotes aren't exactly a tribute to Lloyd Dixon who got alot of this SMPS stuff rolling.....I've got all the references on my shelf...Far worse for problems was the shambles that Unitrode created of the phase shifted control and this was done by other unitrode authors.

If you say "say clear of those books" Can you suggest other books ????

richj

Mr. Dixon...is OK guy... The problem is that the Unitrode books had many "mis-prints" or "typo" errors in the equations....
Mr. Dixon did a good job in making a complex subject into a very palatable understanding the best he could... In very simple first Order explanation.... the books are designed for a wide range of audience...mostly techs....
Power supply analysis can get very deep and tedious when done thoroughly..... I see fellow engineers lost and ready to vomit when I do a thorough design review
The only suggestion I have is to use the UNITRODE, Brown and Pressman books as a introduction to power supplies just to understand the basic concepts....
For more rich understanding look at papers from Middlebrook, Venable, Vorperian, Cuk, Maksimovic.... The "Caltech crew" ....
A good paper to start with is "State-Space Average Modelling of Converters with parasitics and storage time modulation" .....
Also... "Analysis of current-controlled PWM converters using the model of the Current-Controlled PWM switch" .......
Oh,lets not forget Ridley is also great check his paper "A new Continous-Time model for current-mode Control" .....

Chris
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