sawreyrw said:
Hi Rick,
1. Well actually it is not a current mode converter (or is it ?
/me trippin) because voltage feedback signal used to controll the duty cycle of the converter, current feedback is used to limit maximum power and to avoid switch failure from excessive current, and since it is a half bridge flux imbalance is ruled out.2. Yes, I got those in mind and I'll allocate board space for those.
3. Yes, a haven't got there yet, most probable candidates are 3.3uF 400V DC from Wima or Evox-Rifa
4. Thanks for pointing that out, I've been reworking that part lately, updates in next revision (zener voltages fixed too).
5. Yes, but I'm not there yet, most probable candidates are IRF740 with 9.1R gate resistors giving a bit less that 2A of peak current, a bit less than allowed for IR2110.
6. It is, its UF4007 (or some other, I need to check that local guys have in stock)
7. Yes, fixed.
Well that is what forums are for - discussion, and being critical is as best as you can get.
There are more problem just I havent started sorting them out. Output filter needs to be calculated, feedback, loop compensation (time to bring out math books and refresh knowledge on pole-zero analysis), current transformer to be made/bought, input filter bank needs to be sized to reduce ripple, EMI filter needs to be done... work work work.
rejithcv, I havent used/made any of my current transformers but laid my hands on dozen designs that use them.
BTW, is there a consistent way of choosing which core to use for what power, frequency and how to select number of turns, I've been playing with Epcos tools, some russian program which calculates transformers based on dimension, frequency and effective permeability, some online calc, this http://powerelectronics.com/mag/406pet07.pdf , this http://ece-www.colorado.edu/~ecen5797/course_material/Ch15slides.pdf (probably the best but I'll need a couple of days just to get a picture on subject) and I still cant get a clean view on what depends on what, each method gives different results, primary turns from 60 to 20. So far I've come up with ETD 49 from Epcos, N27 material, power up to around 700W, temp rise 35°C.
P.S. Relayless and resistorless soft start coming up in a few days.
The LM5030 is designed to be used as a current mode controller. Given that you have the current transformer, I assumed that was how you intended to use it. (I don't think it is essential to use the LM5030 in current mode; however.)
The LM5030 also controls the voltage, but current loop is inside of the voltage loop.
The LM5030 also controls the voltage, but current loop is inside of the voltage loop.
Yay, finally I've designed the core.
Stuff used and read
http://powerelectronics.com/mag/406pet07.pdf
http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/trafo_hilfe_e.html
http://www-s.ti.com/sc/techzip/slup222.zip <- REAL GOOD!
Epcos magnetics software
Ferroxcube magnetics software
The initial problem was to choose the correct core, I confirmed it with both softwares and a diagram from powerelectronics site, all of them agree that its possible to push around 1kW through ETD49 core at 75kHz with N27 material, I'm calculating everything for 700W.
I'll order this one, plus former, springs, etc.
http://www.distrelec.com/ishopWebFr...and/node/is/aeabacaaagaf/and/series/is/1.html
Then its time to choose number of windings in primary based on how much flux swing is allowed for ferrite I'm using.
Specify input output voltage and duty factor you're optimizing for.
Biggest problem was that everyone specifies flux swing in different way, for example if ferrite is good up to 190mT than its a peak value, so for half-bridge flux swing is twice that, 380mT (and that is the delta B you use to find primaty windings).
You can find the formula in the TI seminars (its good to read them anyway)
I've got 22 turns for primary, 6 turns for both secondarys and 3 turns for auxiliary winding. (If someone can, please verify those) or 19,5,2 as alternative, optimized for ~0.8 duty factor.
Then you have to select the wire, I've allow for ~40°C temp rise, so I've got these diameters - 0.8mm for primary, 2mm for secondary and pretty much anything for aux, I plan to use bunched wire (more on that in TI docs) 0.25mm x 10 for primary and 0.4mm x 25 for secondary, with insulation it takes roughly 0.5 of the available window (I'll need to check if that fits into the window + insulation), if it doesnt fit I'll probably reduce the crossection a bit, we won't be needing all of the power at once, so we're cool here.
Well, lets hope this info will be useful to someone else designing a SMPS transformer.
Stuff used and read
http://powerelectronics.com/mag/406pet07.pdf
http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/trafo_hilfe_e.html
http://www-s.ti.com/sc/techzip/slup222.zip <- REAL GOOD!
Epcos magnetics software
Ferroxcube magnetics software
The initial problem was to choose the correct core, I confirmed it with both softwares and a diagram from powerelectronics site, all of them agree that its possible to push around 1kW through ETD49 core at 75kHz with N27 material, I'm calculating everything for 700W.
I'll order this one, plus former, springs, etc.
http://www.distrelec.com/ishopWebFr...and/node/is/aeabacaaagaf/and/series/is/1.html
Then its time to choose number of windings in primary based on how much flux swing is allowed for ferrite I'm using.
Specify input output voltage and duty factor you're optimizing for.
Biggest problem was that everyone specifies flux swing in different way, for example if ferrite is good up to 190mT than its a peak value, so for half-bridge flux swing is twice that, 380mT (and that is the delta B you use to find primaty windings).
You can find the formula in the TI seminars (its good to read them anyway)
I've got 22 turns for primary, 6 turns for both secondarys and 3 turns for auxiliary winding. (If someone can, please verify those) or 19,5,2 as alternative, optimized for ~0.8 duty factor.
Then you have to select the wire, I've allow for ~40°C temp rise, so I've got these diameters - 0.8mm for primary, 2mm for secondary and pretty much anything for aux, I plan to use bunched wire (more on that in TI docs) 0.25mm x 10 for primary and 0.4mm x 25 for secondary, with insulation it takes roughly 0.5 of the available window (I'll need to check if that fits into the window + insulation), if it doesnt fit I'll probably reduce the crossection a bit, we won't be needing all of the power at once, so we're cool here.
Well, lets hope this info will be useful to someone else designing a SMPS transformer.
VEC7OR,
One question I keep forgetting to ask: Why do you take your output sensing from +31v and 0V? Wouldn't taking it from +31V and -31V be a bit better? This way, your feedback will be symmetric about the 0V output line. Just my $0.02 Worth.
EDIT: I just read some of the App Notes from TI-Unitrode. I seem to remember having a big book from their (Unitrode's) 1984 Seminar on SMPS Design. I especially liked the paper on Mag-amp control.
Steve
One question I keep forgetting to ask: Why do you take your output sensing from +31v and 0V? Wouldn't taking it from +31V and -31V be a bit better? This way, your feedback will be symmetric about the 0V output line. Just my $0.02 Worth.
EDIT: I just read some of the App Notes from TI-Unitrode. I seem to remember having a big book from their (Unitrode's) 1984 Seminar on SMPS Design. I especially liked the paper on Mag-amp control.
Steve
A lot of updates coming soon.
N-Channel, weird question, anyways the load is symmetric, both rails will sag +/- the same, plus its easier to have feedback on smaller rails, plius I have mutually coupled inductors.
As for unitrode seminars - they are so good that you should print em read em shred em put em into the joint and smoke it.
N-Channel, weird question, anyways the load is symmetric, both rails will sag +/- the same, plus its easier to have feedback on smaller rails, plius I have mutually coupled inductors.
As for unitrode seminars - they are so good that you should print em read em shred em put em into the joint and smoke it.
VEC7OR said:
Actually, the load is not symmetric. A audio signal waveform does not always cross the zero line at the same time, and not with any regularity. So, a load with a very wide dynamic range (one that could experience a very sudden bass note, or crashing sound that would drain the energy of one of the output filter caps would not even load down the voltage rail of opposite polarity UNTIL the signal crosses the zero line. Understand that this condition exists for only a millisecond or two, but this very short imbalance in the output of the PSU could have an adverse effect on the Amplifier.
Also, to sense any voltage sags on the (-) rail, the sag would have to be translated back through the mutually-coupled inductor to the (+) rail, and then thru the optocoupler (a two-step process), -v- the direct sampling of the (+) rail (a one-step process).
It may function fine, but it's just my opinion (and experience) that sensing across the entire rail will give better (even if slightly) regulation of the outputs.
As for the papers from Unitrode seminars, I found them very useful and informative.
All you say is true, but I dont think that those effects will be as severe as they are, plus main load of this beast will be a full bridge class D amp, and its intrinsically symmetric, also I'll have plenty of rail caps (20mF per rail, plus the PSU is regulated)
I attach preliminaty layout of the board, it will be 20x20cm.
http://images.bite.lt/banga/files/club/200612/45773c73121cf.png
jamesrnz, the formers are from Distrelec catalogue.
I attach preliminaty layout of the board, it will be 20x20cm.
http://images.bite.lt/banga/files/club/200612/45773c73121cf.png
jamesrnz, the formers are from Distrelec catalogue.
Attachments
Now I'm working on soft-start circuit, I thought about using a triac, but simulation shows that pulse current is a bit high, and charging SMPS primary caps this way wont do much, so I've decided to have a fancy soft-start with resistors, relay and MCU (Attiny12) which will provide us with a fancy-one-button-on-off-switch, allows to have temperature protection, plus I've connected relays as I've seen it on Mark Hennessy pages, this way if soft start relay fails, maximum damage will be a burned out fuse.
Attachments
So I think I finally have it.
Final (most likely) schematics:
http://images.bite.lt/banga/files/club/200612/458f3549b06a8.png
Feedback loop compensated.
Now I'll finish the board and build it.
P.S. Any checks on dumb mistakes would be nice.
Final (most likely) schematics:
http://images.bite.lt/banga/files/club/200612/458f3549b06a8.png
Feedback loop compensated.
Now I'll finish the board and build it.
P.S. Any checks on dumb mistakes would be nice.
According to my experience you are going to get a lot of trouble by mixing the following four things:
- Peak current control
- AC-coupled transformer primary
- A current transformer relying on perfect primary current symmetry for proper reset
- Half wave rectification in the auxiliary winding that feeds the control circuit, thus trying to draw DC from the main transformer.
More pitfalls:
- The auxiliary 36T clamp winding is not likely to work as expected because it will clamp DC-blocking capacitors.
- 36:8 turns ratio is not enough to get 32V output with low line conditions, 30:8 would be more suitable.
- 5+5uH output inductance is too low for your 72Khz clock frequency and 32V output because theoretical current ripple is going to be almost 20App (discontinuous mode). I would not consider anything below 25+25uH.
If you want it to work without much headaches, do the following:
- Change auxiliary winding rectification to full wave.
- Adjust turn ratios and output inductance properly.
And either:
- Keep current mode control and change primary side topology to full bridge.
- Use either a single current sense resistor shared by the two sources of the low side devices, or two current transformers, one sampling the drain of each high side switch.
OR:
- Keep the AC coupled half bridge, change control strategy to voltage mode and leave the current sense transformer for overcurrent shutdown duties only.
- Peak current control
- AC-coupled transformer primary
- A current transformer relying on perfect primary current symmetry for proper reset
- Half wave rectification in the auxiliary winding that feeds the control circuit, thus trying to draw DC from the main transformer.
More pitfalls:
- The auxiliary 36T clamp winding is not likely to work as expected because it will clamp DC-blocking capacitors.
- 36:8 turns ratio is not enough to get 32V output with low line conditions, 30:8 would be more suitable.
- 5+5uH output inductance is too low for your 72Khz clock frequency and 32V output because theoretical current ripple is going to be almost 20App (discontinuous mode). I would not consider anything below 25+25uH.
If you want it to work without much headaches, do the following:
- Change auxiliary winding rectification to full wave.
- Adjust turn ratios and output inductance properly.
And either:
- Keep current mode control and change primary side topology to full bridge.
- Use either a single current sense resistor shared by the two sources of the low side devices, or two current transformers, one sampling the drain of each high side switch.
OR:
- Keep the AC coupled half bridge, change control strategy to voltage mode and leave the current sense transformer for overcurrent shutdown duties only.
- Peak current control
Well its actually voltage controlled and only goes to current control during overload condition.
- AC-coupled transformer primary
It only gives trouble with current mode control
- A current transformer relying on perfect primary current symmetry for proper reset
What are other ways around that ? According to my calculations the core used is greatly oversized.
- Half wave rectification in the auxiliary winding that feeds the control circuit, thus trying to draw DC from the main transformer.
Thanks for pointing that out, most of the schematics that use half-wave rectification are half-forward or flyback ones, and there are no problems with flux creep.
- The auxiliary 36T clamp winding is not likely to work as expected because it will clamp DC-blocking capacitors.
Why ? Its designed for that, in case of overload and current mode control the capacitive divider will walk away from the center and aux winding with diodes will keep it on center, I've seen this in some Unitrode schematics together with explanation.
- 36:8 turns ratio is not enough to get 32V output with low line conditions, 30:8 would be more suitable.
Yes, thats true, I'll probably lower the rails to 28-31V, that will anyhow give me more than enough power.
- 5+5uH output inductance is too low for your 72Khz clock frequency and 32V output because theoretical current ripple is going to be almost 20App (discontinuous mode). I would not consider anything below 25+25uH.
This site http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/hgw_hilfe_e.html recommended 5uH, well maybe thats too low, but whats wrong with that current ripple, the inductor can take it without saturating whatsoever. So should I make new inductor or not ?
- Change auxiliary winding rectification to full wave.
I'll do that.
- Adjust turn ratios and output inductance properly.
Most likely I'll lower the rail voltage a bit, and I'll think what to do with inductor.
- Keep current mode control and change primary side topology to full bridge.
No need for that, current mode control is for overload condition only.
- Use either a single current sense resistor shared by the two sources of the low side devices, or two current transformers, one sampling the drain of each high side switch.
?
OR:
- Keep the AC coupled half bridge, change control strategy to voltage mode and leave the current sense transformer for overcurrent shutdown duties only.
It is this way now.
Well its actually voltage controlled and only goes to current control during overload condition.
- AC-coupled transformer primary
It only gives trouble with current mode control
- A current transformer relying on perfect primary current symmetry for proper reset
What are other ways around that ? According to my calculations the core used is greatly oversized.
- Half wave rectification in the auxiliary winding that feeds the control circuit, thus trying to draw DC from the main transformer.
Thanks for pointing that out, most of the schematics that use half-wave rectification are half-forward or flyback ones, and there are no problems with flux creep.
- The auxiliary 36T clamp winding is not likely to work as expected because it will clamp DC-blocking capacitors.
Why ? Its designed for that, in case of overload and current mode control the capacitive divider will walk away from the center and aux winding with diodes will keep it on center, I've seen this in some Unitrode schematics together with explanation.
- 36:8 turns ratio is not enough to get 32V output with low line conditions, 30:8 would be more suitable.
Yes, thats true, I'll probably lower the rails to 28-31V, that will anyhow give me more than enough power.
- 5+5uH output inductance is too low for your 72Khz clock frequency and 32V output because theoretical current ripple is going to be almost 20App (discontinuous mode). I would not consider anything below 25+25uH.
This site http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/hgw_hilfe_e.html recommended 5uH, well maybe thats too low, but whats wrong with that current ripple, the inductor can take it without saturating whatsoever. So should I make new inductor or not ?
- Change auxiliary winding rectification to full wave.
I'll do that.
- Adjust turn ratios and output inductance properly.
Most likely I'll lower the rail voltage a bit, and I'll think what to do with inductor.
- Keep current mode control and change primary side topology to full bridge.
No need for that, current mode control is for overload condition only.
- Use either a single current sense resistor shared by the two sources of the low side devices, or two current transformers, one sampling the drain of each high side switch.
?
OR:
- Keep the AC coupled half bridge, change control strategy to voltage mode and leave the current sense transformer for overcurrent shutdown duties only.
It is this way now.
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