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Old 7th March 2006, 01:10 PM   #21
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Talking Balancing Act

Zilog,

I believe this balancer ckt came from George Chryssis' book "High Frequency Switching Power Supplies", (c) 1989, from the chapter on transformers.

Eva- correct me if I'm wrong.

Steve
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Old 7th March 2006, 01:47 PM   #22
zilog is offline zilog  Sweden
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Default Re: Balancing Act

Quote:
Originally posted by N-Channel
Zilog,

I believe this balancer ckt came from George Chryssis' book "High Frequency Switching Power Supplies", (c) 1989, from the chapter on transformers.

Eva- correct me if I'm wrong.

Steve

I would be very thankful if anyone could scan or link to the relevant portions, I recently spent my money on Presmans' book that doesnt cover these things :/
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Old 7th March 2006, 03:19 PM   #23
Eva is offline Eva  Spain
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Default Re: Balancing Act

Quote:
Originally posted by N-Channel
Zilog,

I believe this balancer ckt came from George Chryssis' book "High Frequency Switching Power Supplies", (c) 1989, from the chapter on transformers.

Eva- correct me if I'm wrong.

Steve
I don't know that book, I derived the circuit myself, but it's quite unlikely to invent something nowadays
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Old 7th March 2006, 06:55 PM   #24
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Well, unfortunately, the 1984 edition is out of print, and I seem to have misplaced the 1989 edition's ISBN. When I find it, I will post it.

I think I have copied that section (DISCLAIMER: for archival purposes only). Actually, I think I copied the whole book. If I find it, I will either scan it or take a pic of it and post it.
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Old 8th March 2006, 01:33 AM   #25
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Eva:
"I'm sure that it was invented long ago..."

Indeed, Motorola-AN1042 from 1989, read page 6/7..., worked well, I used
this circuit for small pwm-dc-amps which had to work sometimes with shorted output : the worst case for pumping!
Regards
Heinz!
Attached Files
File Type: pdf an1042-d.pdf (93.0 KB, 412 views)
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Old 8th March 2006, 10:10 AM   #26
zilog is offline zilog  Sweden
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Thanks for the article. Does anyone know how sensitive the UcD amplifier scheme is to PSU switcher noise/beating?
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Old 10th March 2006, 04:24 PM   #27
zilog is offline zilog  Sweden
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Looking at the voltage balancer employed in the article - how do I select the proper inductor value and switch frequency (thus peak inductor current)? As I see it I will get a voltage balancer that is able of balancing any current independent of inductor value since a constant voltage offset will cause a constant current drift, the only difference being the time this takes to happen. If this is the case, then I would prefer to use a very large inductor to minimize induced ripple on the voltage lines, but as usual I suspect I might be off here.

Should I maybe think in terms of pumped energy per cycle? How do the formulas (and the explanation) then apply?

Could someone please explain.

/Daniel
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Old 10th March 2006, 06:53 PM   #28
Eva is offline Eva  Spain
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The circuit that I proposed does not employ an inductor but a transformer instead. I see several advantages in the transformer approach, particularly because the inductor will be continuously conducting a high amplitude triangular current wave, even when it has not to correct anything, while the transformer will only have to conduct the error current, thus it may be much smaller.
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Old 11th March 2006, 01:12 AM   #29
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Hi Daniel,
You work as software designer, and we should believe...
"but my computer is unfortunately older than prostitution"

In Your place I would first invest in my working tools then I can use it also for my hobby... to simulate the circuits
Snip
"In order to avoid abusive bus pumping in my halv-brigde topology (2 channels of 200W in 4 ohm each operating from +-45V), I need to have large amount of capacitance in my PSU. Since my PSU will be smps, and thus will switch at above 50 kHz, I wonder if I can reduce the cost of expensive low-ESR capacitors by using a small 2000 uF low-ESR cap in parallell with an ordinary high-ESR 10 000 uF cap on each rail? I suspect that the low-esr cap will soak most of the high frequency ripple so the high-ESR cap wont take too big of a beating, right?"

Thats the easiest...You had to simulate Your PSU, a good design will work also with big capacities!

Snip
"Would it be possible to use this configuration together with a single voltage smps to create a dual output voltage smps by using the balancer to create a fake ground?"

Minimal You need only one supply and ground, the "balancer"
(is simply a invers-converter) can create the other "fake" supply.
Also nice to simulate it
The worst case:
Your amp had to deliver dc-current in a short cut, then the invers converter had to shift about the same current.
If he worked with the same frequency as the amp, the converter-L
can be the same as used in the filter, if the frequency is lower the converter-L had to be proportional bigger (and therefore also the core)
Also hard:
Your load is nearly reactive, as for example a electrostatic fullrange speaker : Now the amp pumps to the supply also near the whole output current for luck usually only for a short time, when worked with 20Hz that is 25ms, than polarity changed and the other side will be charged.
For shure You will assume the amp work with rectangels and deliever max 12A and the cap is 20000uF.
Now calculate 12A X 25e-3 : 2000e-6 = voltage rises at15V.
For a "normally" speaker the situation is more comfortable, because they are not complete reactive,
You or better Your simulator has only to calculate the blind current!
Of course You had to invest a supply voltage monitor which switch off the amp/PSU if the voltage is too high.
If You donīt like high ripple current in the invers converter-L
(why, You accepts this also in the amp/filter) You can rise the L further, but then You need bigger PSU-caps, also this calculation will be a task for Your simulator!
Regards
Heinz!
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Old 15th March 2006, 10:17 PM   #30
zilog is offline zilog  Sweden
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Quote:
Originally posted by Eva
I'm sure that it was invented long ago, but a simple voltage balancer like this should avoid any supply pumping issue:

Click the image to open in full size.

The switches should be operated in a complementary way but with some dead time to allow the transformer to self-balance (with the help of strong RC snubbers that would produce rise/fall times proportional to magnetizing currents).

Eva, your circuit seems nice. One thing I am uncertain about though - if I inject a step voltage difference, wont current in the FETs only be limited by capacitor and winding resistance then (the transformer trying to force equal voltage on both rails)? (and transformer leakage inductance). Does this circuit really work without some sort of pulse-by-pulse current limiting (using say a series inductance)?
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