In order to avoid abusive bus pumping in my halv-brigde topology (2 channels of 200W in 4 ohm each operating from +-45V), I need to have large amount of capacitance in my PSU. Since my PSU will be smps, and thus will switch at above 50 kHz, I wonder if I can reduce the cost of expensive low-ESR capacitors by using a small 2000 uF low-ESR cap in parallell with an ordinary high-ESR 10 000 uF cap on each rail? I suspect that the low-esr cap will soak most of the high frequency ripple so the high-ESR cap wont take too big of a beating, right?
Second, how do I calculate the amount of pumping I will see given a certain rms output current, load frequency and switching frequency? I guess all the pumping energy comes from the output filter inductor? I would really like to simulate this in spice, but my computer is unfortunately older than prostitution
Second, how do I calculate the amount of pumping I will see given a certain rms output current, load frequency and switching frequency? I guess all the pumping energy comes from the output filter inductor? I would really like to simulate this in spice, but my computer is unfortunately older than prostitution
There is a trick to reduce bus pumping considerably (almost totally) in stereo setups:
As the bus pumping is produced with low frequency and high power output signals (bass) and that's almost mono in almost every music piece, you can excite both amplifiers with opposite polarities, and then re-invert the speaker wiring. This way each channel cancels the pumping of the other.
Note that if you want to drive both channels to build a mono bridged setup, this is also automatically accomplished.
This can be a very practical solution.
Adding capacitance to SMPS is not always a good idea, as this can lead to inestabilities due to regulation feedback.
As the bus pumping is produced with low frequency and high power output signals (bass) and that's almost mono in almost every music piece, you can excite both amplifiers with opposite polarities, and then re-invert the speaker wiring. This way each channel cancels the pumping of the other.
Note that if you want to drive both channels to build a mono bridged setup, this is also automatically accomplished.
This can be a very practical solution.
Adding capacitance to SMPS is not always a good idea, as this can lead to inestabilities due to regulation feedback.
The amplifiers are not guaranteed to be fed the same music signal so I cant rely 100% on pumping to cancel, therefore I need to either add more capacitance to take care of the pumping or add a small smps on the bus side to move excessive voltage to the opposite rail in case of pumping.
Say I want to add more capacitance - I already now plan to use an inductor before the capacitor in the smps to reduce ripple enough for feedback to work, what if I add another series inductor from the frist low-esr capacitor to the second high-esr capacitor? will this scheme decouple them enough to maintain proper open loop bandwidth and phase margin for the PSU feedback? I guess the inductor can be made quite large since it only has to handle 10-20 000 Hz ripple since both the psu and the class d amplifiers have their own ripple suppression using LC-circuits.
Say I want to add more capacitance - I already now plan to use an inductor before the capacitor in the smps to reduce ripple enough for feedback to work, what if I add another series inductor from the frist low-esr capacitor to the second high-esr capacitor? will this scheme decouple them enough to maintain proper open loop bandwidth and phase margin for the PSU feedback? I guess the inductor can be made quite large since it only has to handle 10-20 000 Hz ripple since both the psu and the class d amplifiers have their own ripple suppression using LC-circuits.
half-bridge power supply? -- at 50kHz try these values -- (I am going to make a big wild-butted guesstimate that your idle current is a couple amps) -- 2mH for the output inductor and 220uF for the output capacitor. These are overkill values but ymmv.
these guesstimates were made with power 4-5-6 -- you can probably come up with a good guess using SwitcherCad from Linear Technology -- you have to parameterize for the minimum and maximum current and the variation in the primary side voltage. (ps, there is a freebie version of power 456 on On-Semi's website but it only relates to one of ONNN's switching devices).
ping EVA on this -- he is the most enthusiastic SMPS'r on the board.
these guesstimates were made with power 4-5-6 -- you can probably come up with a good guess using SwitcherCad from Linear Technology -- you have to parameterize for the minimum and maximum current and the variation in the primary side voltage. (ps, there is a freebie version of power 456 on On-Semi's website but it only relates to one of ONNN's switching devices).
ping EVA on this -- he is the most enthusiastic SMPS'r on the board.
Zilog,
Without your schematic I am just guessing here. In general, you want to avoid mismatched caps in parallel in an smps. I suspect if actually calculate how the capacitor current are flowing in each cap, based on esr & capacity, you will find the little cap getting hurt.
Adding inductors will also add a pole and phase shift, again you must go through all the calcs.
Without your schematic I am just guessing here. In general, you want to avoid mismatched caps in parallel in an smps. I suspect if actually calculate how the capacitor current are flowing in each cap, based on esr & capacity, you will find the little cap getting hurt.
Adding inductors will also add a pole and phase shift, again you must go through all the calcs.
I dont have any schematic, that's why I ask
But what is then your suggestion to solving this problem if I tell you the amplifier channels carry different signals and thus cant be balanced against each other? small PSU caps and using a secondary side charge pump to cancel out the rail puimping?
How does PSU capacitor ripple current relate to my low frequency current consumed by the amplifiers? This is a pretty large current in the 10A-range during full power.
Second, I know I will get slower voltage mode compensation when usiong larger capacitors, buit does that really matter since the voltage ripple will have such low frequency? I guess I can add any amount of capacitance I wish just as long as I make sure to obtain enough feedback phase margin?
But what is then your suggestion to solving this problem if I tell you the amplifier channels carry different signals and thus cant be balanced against each other? small PSU caps and using a secondary side charge pump to cancel out the rail puimping?
How does PSU capacitor ripple current relate to my low frequency current consumed by the amplifiers? This is a pretty large current in the 10A-range during full power.
Second, I know I will get slower voltage mode compensation when usiong larger capacitors, buit does that really matter since the voltage ripple will have such low frequency? I guess I can add any amount of capacitance I wish just as long as I make sure to obtain enough feedback phase margin?
It is the lack of speed (and tuning) in loop response that creates pumping (overshoot?) in the first place. I would also raise the switching frequency, 250 kHz, to boost response speed.
I believe you will also do better by adding an LC/RC filter AFTER your SMPS (and its feedback tap) to supply bullk energy.
And pinging Eva is also a very good idea!
I believe you will also do better by adding an LC/RC filter AFTER your SMPS (and its feedback tap) to supply bullk energy.
And pinging Eva is also a very good idea!
poobah said:It is the lack of speed (and tuning) in loop response that creates pumping (overshoot?) in the first place. I would also raise the switching frequency, 250 kHz, to boost response speed.
The pumping does not stem from overshoot etc, but from the load pushing back reactive energy to the rails. The half-bridge switchmode amplifier works as a charge pump which transfers energy from one rail to the other with the output filter inductor as energy storage. This pumping effect is equally visible in linear PSUs as well.
Waiting for Eva to enter the game
I dont really understand what you ask, but the feedback loop in a self-oscillatign design takes care of rail voltage differences.
Yes, the rail pumping arises when driving the output with a duty cycle different from 50%, since the output inductor will discharge its inductive energy through the body diode of the opposite output transistor.
Yes, the rail pumping arises when driving the output with a duty cycle different from 50%, since the output inductor will discharge its inductive energy through the body diode of the opposite output transistor.
I guess I'll throw in a thought. The main pumping mechanism in a class D amp would occur when a power supply rail passes enough net current through the output filter inductor for a sufficient length of time.
When a MOSFET turns off, the voltage on the inductor flies back to the opposing power rail momentarily adding charge to its filter capacitor either through the body diode if the MOSFET there has not turned on yet, or through the channel if it has already turned on. If the net voltage at the output load is zero, the cycle-by-cycle voltage increases on the power supply filter capacitors keep transferring back and forth evenly, with neither capacitor building up extra net voltage. Net current passing through output inductor for any appreciable length of time will pump up one of the power supply rails, the greater the current, the greater the pump-up. For this reason, DC output voltage offset into a low resistance produces the serious pumping.
When a MOSFET turns off, the voltage on the inductor flies back to the opposing power rail momentarily adding charge to its filter capacitor either through the body diode if the MOSFET there has not turned on yet, or through the channel if it has already turned on. If the net voltage at the output load is zero, the cycle-by-cycle voltage increases on the power supply filter capacitors keep transferring back and forth evenly, with neither capacitor building up extra net voltage. Net current passing through output inductor for any appreciable length of time will pump up one of the power supply rails, the greater the current, the greater the pump-up. For this reason, DC output voltage offset into a low resistance produces the serious pumping.
I'm awake
I have not experimented with class-D at all, but if we analyse it as a simple buck converter, then the so called "rail pumping" effect becomes a logical consequence of output filter resonance (peaking at HF).
Note that in any buck converter suffering from output filter peaking you may actually get AC output voltages whose peak value is higher than the input voltage, provided the system is excited at the right frequency.
I have not experimented with class-D at all, but if we analyse it as a simple buck converter, then the so called "rail pumping" effect becomes a logical consequence of output filter resonance (peaking at HF).
Note that in any buck converter suffering from output filter peaking you may actually get AC output voltages whose peak value is higher than the input voltage, provided the system is excited at the right frequency.
I'm sure that it was invented long ago, but a simple voltage balancer like this should avoid any supply pumping issue:
The switches should be operated in a complementary way but with some dead time to allow the transformer to self-balance (with the help of strong RC snubbers that would produce rise/fall times proportional to magnetizing currents).
An externally hosted image should be here but it was not working when we last tested it.
The switches should be operated in a complementary way but with some dead time to allow the transformer to self-balance (with the help of strong RC snubbers that would produce rise/fall times proportional to magnetizing currents).
Eva,
It looks like a solution, but wont efficiency become suffering if I cant manage to get my smps transformer turns ratio equal?
Would it be possible to use this configuration together with a single voltage smps to create a dual output voltage smps by using the balancer to create a fake ground?
It looks like a solution, but wont efficiency become suffering if I cant manage to get my smps transformer turns ratio equal?
Would it be possible to use this configuration together with a single voltage smps to create a dual output voltage smps by using the balancer to create a fake ground?
That sounds interesting... Yes, you can use such a balancer to keep a virtual ground centered between both rails, but don't expect this to cause so much complexity reduction in the main SMPS. On the other hand, if the main SMPS lacked a ground output, then the balancer would have to work harder.
Eva,
You dont have any web reference to this voltage balancer? I feel like I need some guidance as I dont really understand how to design snubbers etc. I also wonder how I should incorporate this circuit into my smps, I suspect that I need to make extraordinary things to the voltage mode feedback loop in order to make this work.
You dont have any web reference to this voltage balancer? I feel like I need some guidance as I dont really understand how to design snubbers etc. I also wonder how I should incorporate this circuit into my smps, I suspect that I need to make extraordinary things to the voltage mode feedback loop in order to make this work.
Another thing I am uncertain of is how to decide on things like switching frequency, duty cycle (I guess as large as snubber reset allows), magnetic core size (how does core loss depend on pumped current/voltage?). I guess a too low switching frequency in the voltage balancer will cause excessive ripple voltage on my rails.
I still wonder if this balancer is feasible in a practical circuit - wont the voltage difference between my two secondary windings be forced to be equal - and thus forcing the offset voltage to dissipate through the copper resistance of the transformer secondaries?
I am thinking about using this circuit but with a hysteresis scheme that prevents if from operating with less than say 1V voltage difference. Also I guess the balancer will need to switch synchronous with the primary switches to avoid unneccesary beating effetcs.
I am thinking about using this circuit but with a hysteresis scheme that prevents if from operating with less than say 1V voltage difference. Also I guess the balancer will need to switch synchronous with the primary switches to avoid unneccesary beating effetcs.
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