Re: Balancing Act
I would be very thankful if anyone could scan or link to the relevant portions, I recently spent my money on Presmans' book that doesnt cover these things :/
N-Channel said:Zilog,
I believe this balancer ckt came from George Chryssis' book "High Frequency Switching Power Supplies", (c) 1989, from the chapter on transformers.
Eva- correct me if I'm wrong.
Steve
I would be very thankful if anyone could scan or link to the relevant portions, I recently spent my money on Presmans' book that doesnt cover these things :/
Re: Balancing Act
I don't know that book, I derived the circuit myself, but it's quite unlikely to invent something nowadays
N-Channel said:Zilog,
I believe this balancer ckt came from George Chryssis' book "High Frequency Switching Power Supplies", (c) 1989, from the chapter on transformers.
Eva- correct me if I'm wrong.
Steve
I don't know that book, I derived the circuit myself, but it's quite unlikely to invent something nowadays
Well, unfortunately, the 1984 edition is out of print, and I seem to have misplaced the 1989 edition's ISBN. When I find it, I will post it.
I think I have copied that section (DISCLAIMER: for archival purposes only). Actually, I think I copied the whole book. If I find it, I will either scan it or take a pic of it and post it.
I think I have copied that section (DISCLAIMER: for archival purposes only). Actually, I think I copied the whole book.
If I find it, I will either scan it or take a pic of it and post it.Looking at the voltage balancer employed in the article - how do I select the proper inductor value and switch frequency (thus peak inductor current)? As I see it I will get a voltage balancer that is able of balancing any current independent of inductor value since a constant voltage offset will cause a constant current drift, the only difference being the time this takes to happen. If this is the case, then I would prefer to use a very large inductor to minimize induced ripple on the voltage lines, but as usual I suspect I might be off here.
Should I maybe think in terms of pumped energy per cycle? How do the formulas (and the explanation) then apply?
Could someone please explain.
/Daniel
Should I maybe think in terms of pumped energy per cycle? How do the formulas (and the explanation) then apply?
Could someone please explain.
/Daniel
The circuit that I proposed does not employ an inductor but a transformer instead. I see several advantages in the transformer approach, particularly because the inductor will be continuously conducting a high amplitude triangular current wave, even when it has not to correct anything, while the transformer will only have to conduct the error current, thus it may be much smaller.
Hi Daniel,
You work as software designer, and we should believe...
"but my computer is unfortunately older than prostitution"
In Your place I would first invest in my working tools then I can use it also for my hobby... to simulate the circuits
Snip
"In order to avoid abusive bus pumping in my halv-brigde topology (2 channels of 200W in 4 ohm each operating from +-45V), I need to have large amount of capacitance in my PSU. Since my PSU will be smps, and thus will switch at above 50 kHz, I wonder if I can reduce the cost of expensive low-ESR capacitors by using a small 2000 uF low-ESR cap in parallell with an ordinary high-ESR 10 000 uF cap on each rail? I suspect that the low-esr cap will soak most of the high frequency ripple so the high-ESR cap wont take too big of a beating, right?"
Thats the easiest...You had to simulate Your PSU, a good design will work also with big capacities!
Snip
"Would it be possible to use this configuration together with a single voltage smps to create a dual output voltage smps by using the balancer to create a fake ground?"
Minimal You need only one supply and ground, the "balancer"
(is simply a invers-converter) can create the other "fake" supply.
Also nice to simulate it
The worst case:
Your amp had to deliver dc-current in a short cut, then the invers converter had to shift about the same current.
If he worked with the same frequency as the amp, the converter-L
can be the same as used in the filter, if the frequency is lower the converter-L had to be proportional bigger (and therefore also the core)
Also hard:
Your load is nearly reactive, as for example a electrostatic fullrange speaker : Now the amp pumps to the supply also near the whole output current for luck usually only for a short time, when worked with 20Hz that is 25ms, than polarity changed and the other side will be charged.
For shure You will assume the amp work with rectangels and deliever max 12A and the cap is 20000uF.
Now calculate 12A X 25e-3 : 2000e-6 = voltage rises at15V.
For a "normally" speaker the situation is more comfortable, because they are not complete reactive,
You or better Your simulator
has only to calculate the blind current!
Of course You had to invest a supply voltage monitor which switch off the amp/PSU if the voltage is too high.
If You don´t like high ripple current in the invers converter-L
(why, You accepts this also in the amp/filter) You can rise the L further, but then You need bigger PSU-caps, also this calculation will be a task for Your simulator!
Regards
Heinz!
You work as software designer, and we should believe...
"but my computer is unfortunately older than prostitution"
In Your place I would first invest in my working tools then I can use it also for my hobby... to simulate the circuits
Snip
"In order to avoid abusive bus pumping in my halv-brigde topology (2 channels of 200W in 4 ohm each operating from +-45V), I need to have large amount of capacitance in my PSU. Since my PSU will be smps, and thus will switch at above 50 kHz, I wonder if I can reduce the cost of expensive low-ESR capacitors by using a small 2000 uF low-ESR cap in parallell with an ordinary high-ESR 10 000 uF cap on each rail? I suspect that the low-esr cap will soak most of the high frequency ripple so the high-ESR cap wont take too big of a beating, right?"
Thats the easiest...You had to simulate Your PSU, a good design will work also with big capacities!
Snip
"Would it be possible to use this configuration together with a single voltage smps to create a dual output voltage smps by using the balancer to create a fake ground?"
Minimal You need only one supply and ground, the "balancer"
(is simply a invers-converter) can create the other "fake" supply.
Also nice to simulate it
The worst case:
Your amp had to deliver dc-current in a short cut, then the invers converter had to shift about the same current.
If he worked with the same frequency as the amp, the converter-L
can be the same as used in the filter, if the frequency is lower the converter-L had to be proportional bigger (and therefore also the core)
Also hard:
Your load is nearly reactive, as for example a electrostatic fullrange speaker : Now the amp pumps to the supply also near the whole output current for luck usually only for a short time, when worked with 20Hz that is 25ms, than polarity changed and the other side will be charged.
For shure You will assume the amp work with rectangels and deliever max 12A and the cap is 20000uF.
Now calculate 12A X 25e-3 : 2000e-6 = voltage rises at15V.
For a "normally" speaker the situation is more comfortable, because they are not complete reactive,
You or better Your simulator
has only to calculate the blind current!Of course You had to invest a supply voltage monitor which switch off the amp/PSU if the voltage is too high.
If You don´t like high ripple current in the invers converter-L
(why, You accepts this also in the amp/filter) You can rise the L further, but then You need bigger PSU-caps, also this calculation will be a task for Your simulator!
Regards
Heinz!
Eva said:
Eva, your circuit seems nice. One thing I am uncertain about though - if I inject a step voltage difference, wont current in the FETs only be limited by capacitor and winding resistance then (the transformer trying to force equal voltage on both rails)? (and transformer leakage inductance). Does this circuit really work without some sort of pulse-by-pulse current limiting (using say a series inductance)?
You will have a hard time injecting a step big enough into a PSU capacitor bank (such a simple circuit must have some pitfalls). Ttransformer leakage inductance will ensure limited current slopes, since in such a circuit the voltage applied to the leakage inductance in order to energize it is equal to the amount of voltage unbalance betweem rails.
(such a simple circuit must have some pitfalls). Ttransformer leakage inductance will ensure limited current slopes, since in such a circuit the voltage applied to the leakage inductance in order to energize it is equal to the amount of voltage unbalance betweem rails.Thanks Eva,
You dont have any nice way of synchronizing the balancer to the primary smps switcher, I am thinking about using a clock chip to generate clock for both primary side switchers for the current mode control aswell as for the balancer (controlled by some PLD stuff that generates 45%+45% waveforms) and drives the balancer using transformers.
I could have used I synchronous rectivier driver, but I want the balancer to switch even if there is no primary side switcher activity.
You dont have any nice way of synchronizing the balancer to the primary smps switcher, I am thinking about using a clock chip to generate clock for both primary side switchers for the current mode control aswell as for the balancer (controlled by some PLD stuff that generates 45%+45% waveforms) and drives the balancer using transformers.
I could have used I synchronous rectivier driver, but I want the balancer to switch even if there is no primary side switcher activity.
Good explanation of Class D bus pumping!!
Hello SubWo1,
Your explanation is the best I have found after searching the web for a whole day on the issue of class D bus pumping and how it affects half-bridge stages more than full bridge stages. You explain it!
The reason why bus pumping is difficult to understand is because we fail to look at the switching frequency. It's the switching frequency that causes the pumping when near-DC currents are to be generated by the stage.
For example, imagine trying to get a positive DC current out of your class D amp. A real positive DC current would not cause any apparent problems. But in reality, it's going to be pulsed, not DC: positive curent, no current, positive current, etc. And for every pulse of the class D stage, a flyback current gets pushed back into the system. For half-bridge, this flyback current charges up the negative rail capacitor, which eventually reaches overvoltage. For full-bridge, this flyback current goes back into the one and only capacitor which is providing power to the stage, so it won't reach overvoltage.
So a full bridge class D could, in theory, provide a DC current, but a half bridge class D would soon exceed the safe bus voltage on that rail which is not utilized, but which receives all the flyback energy.
Finally a complete explanation!
Thanks.
subwo1 said:
Hello SubWo1,
Your explanation is the best I have found after searching the web for a whole day on the issue of class D bus pumping and how it affects half-bridge stages more than full bridge stages. You explain it!
The reason why bus pumping is difficult to understand is because we fail to look at the switching frequency. It's the switching frequency that causes the pumping when near-DC currents are to be generated by the stage.
For example, imagine trying to get a positive DC current out of your class D amp. A real positive DC current would not cause any apparent problems. But in reality, it's going to be pulsed, not DC: positive curent, no current, positive current, etc. And for every pulse of the class D stage, a flyback current gets pushed back into the system. For half-bridge, this flyback current charges up the negative rail capacitor, which eventually reaches overvoltage. For full-bridge, this flyback current goes back into the one and only capacitor which is providing power to the stage, so it won't reach overvoltage.
So a full bridge class D could, in theory, provide a DC current, but a half bridge class D would soon exceed the safe bus voltage on that rail which is not utilized, but which receives all the flyback energy.
Finally a complete explanation!
Thanks.
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