Delayed capacitor discharge in SMPS

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This is an idea for SMPS optimization: inviting comments


I propose a modification to the way bulk smoothing capacitors are implemented in an SMPS. This may be either the post line-rectifier capacitors in a single-stage switcher, or the filter capacitors between the PFC and PWM stages in cascaded supplies.

The capacitor should be allowed to charge to the peak line voltage (or boost voltage), and then taken out of circuit by a MOSFET switch.
This capacitor would then be allowed to start discharging when the amplitude of the input voltage reaches low-line (or close to it).

This means that if a switcher was designed with a low-line of 90 V, the MOSFET switch disconnects the cap at high line, and keeps it out-of circuit and fully charged as the line starts declining.
Then it re-connects the capacitor --fully charged to 170 or 330V-- into the circuit when the rectified sine falls to 92 or 93 V, thus providing the stored energy there where it's needed most.

In current designs, as the line drops from high-line to low-line, the power switch draws current from the line as well as from the filter capacitor. This is an unnecessary waste of capacitor charge, during a time whe the line would be able to supply all needed current anyway.

The immediate implications of this are:

Lower capacitor value required to do the same job;
OR
Higher low-line voltage, allowing the PWM stage to use more of its regulating capacity to manage the load.

If the MOSFET switching the capacitor is synced to switch only during PWM switch OFF times ( zero current), then switching losses in this MOSFET should be negligible.

If a capacitor size reduction is implemented as a result of this approach, we have effectively replaced eletrolytic volume with (smaller, but more complex) semiconductor volume. We have also transferred functionality from a less reliable medium to more reliable ones, and have achieved a size reduction in the process.

Adriano
 
without PFC-stage it makes PF even worse than ordinary rectifier-cap system. With pfc-stage it should be possible correct this somehow..

For reliability I am not so impressed, mains bulk caps last usually at least3 times longer than any other electrolytic cap in same supply... I have changed maybe thousands of elcaps to smps units but yet not a single bulk cap. Some vvvery old television sets can have dried bulk caps but I havent personally met any.
 
Typically, when an electrolytic capacitor ages, it loses capacitance gradually. This is not a spectacular failure and generally does not result in replacement. I don't know how many people measure the capacitance of bulk electrolytics on every SMPS that passes through their hands.

If a bulk cap loses 20% or 40% of its capacity, noone may notice.
But once the ripple gets larger, this may cause OTHER components to fail in the circuit, including other capacitors.

Although I've personally seen el caps from a 1940 TV yellowed by heat, measuring the same capacitance as marked, this is an aberration. I'm sure there are stories at the other end of the spectrum too.

The way I see it, El caps are the only NON-SOLID-STATE components on a board (they-re liquid inside).

Most importantly, in my area, high value-high-voltage electrolytics cost a lot more than medium power MOSFETS or power bipolars.

When I build an SMSP the el caps are easily the most expensive item in my parts list.
 
In linear power supply design the capacitors are chosen primarily on the basis of their value. This is to ensure that ripple voltage can be sufficiently reduced.

The bulk input capacitors in SMPS designs are chosen more on the basis of their current rating. This also applies to the output caps in a SMPS.

In the case of a pulsed current:

Irms = Ipeak * (DC)^.5 where DC equals duty cycle.

So if you double Ipeak and halve DC, you still wind up with a greater RMS current (1.41) even though you delivered the same amount of charge. This means larger capacitors to handle the heat and less efficiency.

You achieve the best efficiency when you draw the least current over the longest period.



:D :D
 
Regarding the above post,

Let me preemptively address power factor, since someone inevitably will latch on to this point.

1. Not every circuit idea needs to be judged based on its line current use. Sometimes the benefits outweigh the drawbacks, and what weight each of us attributes to these benefits is an individual decision.

2. We need to keep a broad perspective. It is healthy to have a moderate concern for power factor, it is less healthy to have a obsessive concern for it.

3. Not all parts of the world impose equally stringent requirements on line harmonic generation. What is law in one country may be simply a guideline in another. We need to keep an international perspective.

4. Hobbyist products need not be held to the same standards as commercially manufactured goods.

5. The nature and extent of many hobbyist activities may already place the hobbyist in violation of other social limitations, such as residantial space utilization, home insurance terms and conditions, fire regulations, some of which are actually more important than power factor.

6. The above design draws non-sinusoidal current, specifically greater current on the "sides" of the sine peak. It's a "U" shape of bowl shape current waveform.
This happens to complement well appliances equipped with 60 Hz transformer/rectifier power supplies which draw current in the middle of the sine wave. Plugging in a device equipped as above in such a household, would actually rise the power factor closer to 1.
 
mzzj

For reliability I am not so impressed, mains bulk caps last usually at least3 times longer than any other electrolytic cap in same supply

Semiconductors last longer still.

Check ElCap manufactures lifetime spec...3000 Hours.

In any case, mzzj, you don't have to be impressed. I am not interested in impressing you.
Let's see you offer a design suggestion.
 
Poobah:

I gotta try that thing with the dogs...


Help me understand this: You're saying that the smaller the DC the less efficient is the power transfer? and 41% of the power will be wasted as heat?

But some SMPS design notes recommend doubling the 120V line to 240V before using it in a switcher, quoting better performance that way. Yet 240V will be running at half the DC.

I can't figure this out.
 
telewatt said:
Typically, when an electrolytic capacitor ages, it loses capacitance gradually. This is not a spectacular failure and generally does not result in replacement. I don't know how many people measure the capacitance of bulk electrolytics on every SMPS that passes through their hands.

If a bulk cap loses 20% or 40% of its capacity, noone may notice.
But once the ripple gets larger, this may cause OTHER components to fail in the circuit, including other capacitors.

.
Capacitance loss is almost never problem in SMPS, its invariably always increased ESR.

And yes, I have measured my share of old caps (esr/capacitance) from SMPS units when developing esr-meter....
 
Vittorio said:
mzzj

Check ElCap manufactures lifetime spec...3000 Hours.

3000 hours at 105C, 6000 at 95c, 12k at 85c etc...



If you invite for comments i expect that i can describe my impressions also....

----
Poobah may have point with ripple current ratings, i am too tired to do actual maths with typical real-world component values but ...
 
Vittorio said:


If the MOSFET switching the capacitor is synced to switch only during PWM switch OFF times ( zero current), then switching losses in this MOSFET should be negligible.

Adriano

I am not sure if i got this right, during low-line mosfet connects "boost" cap parallei to orginal filter cap or how because that would result amazing peak dissipation in mosfet switch?
 
Hey Vector,

SMPS is nice because you can look at one cycle or part of a cycle and see things in a simpler way.

Let's talk about amp-seconds (coulombs). Say you want to put 1 Amp-second into a capacitor, forget about voltage for the moment, awssume the capacitor is large the voltage doesn't really change, and the capacitor has 1 Ohm of internal resistance.

Look at the power lost in the following:

1A * 1s, loss = I^2*R = 1 watt; over one second = 1 Joule

.5A * 2s, loss = .5^2*1 = .25 watt; over 2 second = 1/2 Joule

.25A * 4s, loss = .25^2*1 = 0.062 watt; 4 seconds = 1/4 Joule

In each case, the charge delivered is the same, however the faster you try to charge the cap the more energy is lost in heat.

In the case of a forward convertor (the same ole' 1 to 1 reset winding). you want your worst case low line DutyCycle to be as close to 50% as possible... so you are discharging the input caps at the slowest possible (most efficient rate).

Does this make sense?

:D
 
during low-line mosfet connects "boost" cap parallei to orginal filter cap or how because that would result amazing peak dissipation in mosfet switch?

There is no original filter cap. The switched cap would be the only filter cap. It should be put onto the rails at a moment when the PWM switch is OFF.

An ORing diode upstream on the positive line should prevent any current from capacitor back into the source.

I have not thought about the exact details of switching, am just considering a concept for feasability.
 
Vittorio said:


There is no original filter cap. The switched cap would be the only filter cap. It should be put onto the rails at a moment when the PWM switch is OFF.

An ORing diode upstream on the positive line should prevent any current from capacitor back into the source.

I have not thought about the exact details of switching, am just considering a concept for feasability.
Ok, this makes sense.
 
poobah said:
You can't cheat the devil!
I cheated with pspice some more and optimized mosfet switching timing to minimum ripple, apprx. 450w load and one 220uF cap.
Vittorio:
44v p-p ripple
traditional:
49v p-p ripple
Cap ripple current 2.77-2.8arms or sumething samesame...

Not a big difference, think more economical to increase capacitor size to get required max ripple voltage.
 
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