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Old 17th December 2005, 09:34 PM   #11
poobah is offline poobah  United States
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A Primary to Reset winding of ratio is 1 to 1 is popular because it allows for a bifilar winding, primary and reset wound together, which minimizes leakage inductance and also reduces spikes on the drain.

The goal is not change the reset turns to accomodate the duty cycle. The goal is to correct the secondary turns to reduce the duty cycle.

Schottky diodes on the output would be a good idea to reduce waste heat.

The inductor size is balancing act. The larger the inductor the less ripple current you have in the output caps. But the power can be slow to respond to changes in load.

Eva makes a very good point, you should also calculate at low Vin to be sure you have enough windings on the secondary... 11 or 12 is minimum maybe 15 or 16 would be safer... you have to choose your value for Vin (low).

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Old 17th December 2005, 09:42 PM   #12
Eva is offline Eva  Spain
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But duty cycle limitation is still mandatory because the control circuit will be asked for maximum duty cycle during startup, during load transients, and also during low line conditions. No matter how much secondary turns are employed, transformer saturation and possible latch-up or oscillation may still occur if duty cycle is not properly limited. I Just wanted to make that point clear
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Old 17th December 2005, 10:09 PM   #13
poobah is offline poobah  United States
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You make a very excellent point...

The ideal method is to use a chip with 45% DC limit built-in. This is current mode control... many of these chips have a second circuit for current detection to protect against low line etc...

Let's Check!



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Old 17th December 2005, 10:34 PM   #14
poobah is offline poobah  United States
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There is an internal current limit that operates at .9v Perhaps the secondary turns should be increased much higher... like 20 turns or so... to bring the normal operating DutyCycle to about 30% this would allow a good margin for overload.

EVA??

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Old 17th December 2005, 11:44 PM   #15
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A few comments - Eva is right about the possibility of core saturation., especially since you are using a simple 1:1 reset winding. Also, the NCP1200 has an inherently high resistance gate driver structure, if you take a look at the spec sheet. The chip is really optimized for very low power flyback applications. The series resistor and diode you have on the gate of your MOSFET are probably not needed.

Since you are dealing with only 50W output at relatively high output voltage, is there any reason not to use a flyback? This will get around a lot of the problems you are facing, at the expense of having a couple of output capacitors to handle the ripple current.

If you stick with the forward, you will need a more flexible reset scheme to accomodate duty cycle > 50%, or a different controller. At the 50W level, something like an RCD snubber/reset network would work better than a 1:1 reset winding. A controller that has a sliding duty cycle limit vs. input voltage would also be a good idea. Otherwise, you could use one of the old indusry standard Unitrode 384X series that has a 50% duty cycle limit. These chips require a startup resistor, but designers have dealt with this for years.
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Old 18th December 2005, 01:23 AM   #16
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Thanks
poobah, eva, wrenchone

Ouch! that's true, it's an 80% DC controller!
It was stupid of me not to have looked closely at the spec sheet.

I substituted this chip for an NCP1216, which was unavailable, and assumed everything was the same.

When the switching waveforms never went past about 50%, I found confirmation that it must be the controller limiting the DC.

It was actually the transformer saturating at maybe 55% and not letting the DC go any higher.

Thanks again
Andy
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Old 18th December 2005, 01:29 AM   #17
poobah is offline poobah  United States
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So you won't get your feelings hurt by changing chips?

1 to 1 reset windings, if bifilar, are best because you don't have to snub your FET.

Do you have room to jack up Ns in your present core???
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Old 18th December 2005, 02:03 AM   #18
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I do have room for more turns on sec.

I'm actually recycling an existing transformer from a dead SMPS.

It was a push-pull, so that's why I've got 1:1 on the primary.

I wouldn't want to mod the primaries 'cuse they're buried deep and I like the trafo the way it is. But I'll certainly be able to add turns to the secondary, since there is about 1mm of space still remaining between coil and core.

This is only a temporary fix, since it doesn't address the duty cycle surge mentioned by Eva at startup ( I hadn't thought about that ). I'll wait a couple of weeks to get the NCP1216 that's backordered, and plug that in when it comes.


Andy
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Old 18th December 2005, 02:14 AM   #19
poobah is offline poobah  United States
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You'll still need to increase your Ns turns for keeps... use EVA's equation Mine had small mistake... or did it??


If your power supply will have relatively constant load & you have the DC limit chip you could easily set your Ns turns for a DC of 40% at low Vin. This wont push your Ip up too much and the supply will just come up. and react to load changes, a little slower.

Cool!
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Old 18th December 2005, 03:28 PM   #20
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Yes, I'll increase n(s) permanently.

The big pitfall was having trimming potentiometers on both the voltage and current sense loops. I had intended to experiment with different settings for different MOSFETS, different output powers etc.
But the adjustment ranges of these pots go into some unsafe territoty. There is a reason no PS are made with w-i-d-e adjustment ranges on the sense dividers.

Valuable lesson learned: if I'm going to experiment, I'd better not get lazy about reading the specs line-by-line.
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