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Old 15th September 2005, 10:06 AM   #1
DaBit is offline DaBit  Netherlands
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Default EMC problems with flyback converter

Hi guys,

I have designed a special power supply. This supply accepts 18-32VDC, 85-265VAC and a 24V backup battery, and produces isolated 48V @ 1.5 amps and 5V @ 0.5 amps. When external DC and/or AC is available, it uses that and it charges the battery. When external supplies fail, it switches over to backup battery and keeps on monitoring charge status. A microcontroller processes all the status information and transmits it over a TCP/IP connection.

Now, the supply works. But yesterday we did some preliminary unofficial EMC testing to see if the power supply could possibly pass the test. Well, it can't.

The offline converter radiates a terrible lot of noise through the power cabling, but it is quite low-frequency, so more filtering could solve that.

The 24VDC -> 48VDC/5VDC flyback converter is more problematic. Check the picture below:

Click the image to open in full size.

This is the conducted energy through the 24VDC supply cable. As you can see, there is a lot of EMI from 9MHz on.

I wonder where this comes from, and how I solve this. It seems to come from the parasitic oscillations (leakage inductance/winding capacitance?) when the FET turns OFF. The configuration is quite standard: UCC2800 current control SMPS IC running at 160kHz, IRF540 FET, transformer using an ETD29 N87 core gapped to 0.5mm, and on the secondary side two windings, fast recovery diodes, optocoupler feedback. I am using RCD snubbers over the primary winding, and small snubbers (150E / 100pf) over the secondary FR diodes.

Also, there is a common mode choke and LC filter on the input of the converter, and another common mode choke where the power cable enters the PCB.

Anyone any ideas?
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Old 15th September 2005, 02:39 PM   #2
Eva is offline Eva  Spain
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This plot looks quite strange to me. It's too smoth, shall there were ringing issues then the EMI plot would show very marked peaks.

Could you provide more data? (Things like layout pictures, oscilloscope pictures of switching waveforms and also pictures of the waveform induced in a loop antena placed over different places of the PCB.
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Old 15th September 2005, 04:32 PM   #3
DaBit is offline DaBit  Netherlands
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Some more pictures.

Part of the schematic:

Click the image to open in full size.

Some things are wrong in this schematic, such as the orientation of some diodes. That is corrected. And one thing is missing: there is a 75E/330p snubber over the primary winding. The reason: it was redrawn in Mentor before layout with my schematic as the reference.

DC input to this part comes from the supply switchover, which is basically a diode OR and a P-channel FET to switch over to battery when needed. And some control and monitoring logic. At the 24V entrance there are two 10nF capacitors to earth and a small PI-filter.

Part of the PCB. Sorry for the bad picture; I only have my GSM available at the moment.

Click the image to open in full size.

The waveform on the drain of the MOSFET, supply loaded with about 50W:

Click the image to open in full size.

Setting of the scope: 10V/div Y axis, 2usec/div X-axis.

And then the battery of the GSM depleted

Tomorrow I will post screenshots from the PCB tool and some more waveforms such as the current through the transformer (well, inductor actually).
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Old 15th September 2005, 05:56 PM   #4
Eva is offline Eva  Spain
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The "Y" common-mode shunting capacitor is missing on that schematic, that may increase common-mode EMI by an order of magnitude. It should be placed very close to the transformer to avoid resonance.

The switching waveform shows abnormal turn-on (that small peak shouldn't be here) and a lot of leakage inductance at turn off. Check Vgs and Vds waveforms together in dual trace mode, make a picture at less us/div in order to see more clearly what happens during switching transients. How did you wind that transformer?

Also note that the clamping circuit across the primary winding is very prone to ringing and must be placed near the transformer. Same applies to secondary side diodes and capacitors.
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Old 16th September 2005, 12:24 PM   #5
DaBit is offline DaBit  Netherlands
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Quote:
Originally posted by Eva
The "Y" common-mode shunting capacitor is missing on that schematic, that may increase common-mode EMI by an order of magnitude.


OK, I tried adding one (currently a 1000pF/100V ceramic capacitor, not a 'real' Y-capacitor) between pin 1 and pin 11 of the transformer. I soldered it directly underneath the transformer in the shortest possible path between the two pins.

As far as I can see on the (quite old) spectrum analyser we have here this decreases EMI from 30MHz on, but increases EMI below 30MHz.

Between what pins should it be placed? 1 and 11 seemed the best choice to me.

Quote:
make a picture at less us/div in order to see more clearly what happens during switching transients.
I will do that.

Quote:
How did you wind that transformer?
I did not wind them; they were ordered and wound for this application. At that time I had no idea how to design a transformer, so I had that company design the transformer, given the schematic and design parameters. They came up with:

EPCOS ETD29 core, N87 ferrite, 0.5mm gap (Al is 201)
Primary 16 turns 0.70 mm diameter.
Secondary 31 turns 0,35 mm diameter (48V)
Secondary 10 turns 0,35mm diameter (5V)

Primary inductance = 20.1 uH
Secondary inductance = 193 uH

Then I started studying and redid the calculations myself. IMHO the transformer is not up to the job. The single primary winding is too small/thin and suffers from high AC losses. The 10 turns secondary produces a large voltage which causes a lot of loss in the 7805, which ends up as heat. Also, the flux swing due to 16 primary turns increases core losses.

When I do the calculations myself and set the boundary between discontinuous and continous operation at Iout_48V=0.6A, Iout_5V=0.4A (A bit below the minimum load applied to the PSU in the minimum system configuration.), I come to an inductance of 7uH. Which would mean 6 primary windings, 18 secondary1 windings, and 3 secondary2 windings on the same core.

If rewinding the transformer could solve many problems, I am willing to rip one apart and rewind it. After all it's not that much work.

Quote:
Also note that the clamping circuit across the primary winding is very prone to ringing and must be placed near the transformer. Same applies to secondary side diodes and capacitors.
I agree that the clamping circuit is at the wrong place. Besides that it is going to be hard to make the current loops much smaller. wihout sacrifying cooling of the diodes.

BTW: I also tried putting a small snubber over the Schottky in the clamp; it did not make any difference.
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Old 16th September 2005, 07:05 PM   #6
Eva is offline Eva  Spain
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I can no longer see your pictures so I don't know where pins 11 and 1 are connected. The right place for the "Y" capacitor should be betweem primary Vcc and secondary gnd. Try 4.7nF.

Concerning transformer design, a simple trick to half the leakage inductance is to split the primary in two equal layers, connect them in series and place the secondaries inbetween. Actually, leakage inductance reduction would be proportional to the number of interspersed layers. Paralell connection is also possible but it may cause excessive ringing sometimes.
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Old 17th September 2005, 08:50 AM   #7
DaBit is offline DaBit  Netherlands
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Quote:
Originally posted by Eva I can no longer see your pictures
Strange, thay are still online?

Quote:
so I don't know where pins 11 and 1 are connected. The right place for the "Y" capacitor should be betweem primary Vcc and secondary gnd. Try 4.7nF.
That's where it is now; between primary Vcc and 48V secondary GND. Although I used 1nF only since it was lying on my desk.

I need at least 1000VDC isolation between the primary and the secondaries. At least that is what they will test. Would a regular Y2 capacitor be good enough? They are m ade to withstand those voltages for several minutes.

What about the second insulated voltage (5V). Would I need a second Y capacitor between primary Vcc and that secondary GND too?

Would it be wise to parallel a huge value resistor to the Y capacitors to prevent static charging of the secondary sides?

Quote:
Concerning transformer design, a simple trick to half the leakage inductance is to split the primary in two equal layers, connect them in series and place the secondaries inbetween.
I think I will try my calculated transformer first before attacking the other problems since I am not happy with the current transformer. Then I would need a 6-turn primary. Is it still advisable to split that into 2 3-turn primaries directly above the gap?

I still need to calculate penetration depth and AC losses, but the outcome will probably be that multiple parallelled smaller-diameter-wire primaries would be better. How would I spit those between two windings?
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