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Old 25th August 2005, 08:26 AM   #11
Eva is offline Eva  Spain
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Asymmetric secondaries won't produce asymmetric output voltages in that configuration since each secondary is powering both output rails alternatively.

Output imbalance is probably due to a duty cycle asymmetry issue that the DC blocking capacitor compensates with some offset, thus yielding asymmetric volt*second product to the output inductors.

On the other hand, I've been using SG3525A for several years and some units have proved to be quite asymmetric, particularly when a low value discharge resistor is employed and at low duty cycles. This behaviour suggests that the IC is actually suffering from internal ground loops, but that shouldn't be an issue when coupled output inductors are employed.

Note that the asumption that duty cycle will be perfectly matched between sides of the bridge can't just be made because there are several unpredictable sources of mismatching and the circuit must cope with them.
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Old 25th August 2005, 09:15 AM   #12
Pierre is offline Pierre  France
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Thanks, Eva. That matches with what I thought: differences in secondary turns cannot produce different in output voltages in each rail.
I hope that won't cause major problems like transformer walking into saturation (you have worried me saying that the coupling cap can create offset due to different duty cycles)

I will measure the duty-cycle of both SG3525 outputs carefully to see if there are any differences for various duty-cycles. If I find them, I will try with different discharge res. values to see if that's corrected.

Your experience is unvaluable!

Best regards,
Pierre
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Old 25th August 2005, 09:38 AM   #13
Pierre is offline Pierre  France
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Done: the SG3525 outputs (with the mains disconnected and no mosfets, that shouldn't change anything, anyway), have duty-cycles that differ only in a decimal, for example, 30 and 30.1%.
The greatest difference is at max. duty cycle: 44% and 44.3%. That kind of error may be due to my Tektronix DSO, however. In any case, that should produce a difference of less than 1V, while I have observed up to 7-8V unbalance.

Now I have to check the gate-source waveforms of both mosfets just in case there is something weird in the high side or whatever.

so... having an assymmetric secondary (12 vs 13 turns, for example), shouldn't have any effect other than output voltages different to calculated (but both the same), right? I was thinking in re-winding my transformer, but if that's true, I think it doesn't worth the pain.

Thanks
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Old 25th August 2005, 09:44 AM   #14
mzzj is offline mzzj  Finland
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Quote:
Originally posted by Pierre
Please verify that the formula I am using for calculation of the flux density vs primary turns is correct:

Np=(V*10^8)/(4*B*f*A)

where...
V=320/2=160V
B is expressed in Gauss
f is expressed in Hz
A is żEFFECTIVE AREA? in cm^2 (172mm^2=1.72cm^2 for ETD44) ???

That gives 1100 gauss for 26 primary turns, at 80KHz that's about ok for a 3C90 core, isn't it?

Thanks for the clarifications!
flux swing (delta)B=(V*t)/(N*A)
B=Teslas
V=160v
t= maximum pulse width in us
N=turns
A=efective core area in mm^2

I got flux swing of 220mT wich is same as your 1100 gauss peak. i prefer this equation as it is easier to remember for me and uses easy units without coefficients

110mT on 3C90 @80khz should be ok.
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Old 25th August 2005, 10:14 AM   #15
Eva is offline Eva  Spain
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The DC blocking capacitor charges in order to compensate for asymmetric duty cycles and prevent saturation, but that correction offset, together with the asymmetric duty cycle that it's compensating for, are a source of output imbalance. The DC blocking capacitor will prevent any kind of saturation as long as fixed duty cycle or voltage control is employed (it will cause a lot of trouble with current control, though).
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Old 25th August 2005, 10:37 AM   #16
Pierre is offline Pierre  France
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This is starting to resemble a chat! ;-)
Well, then it seems that everything is about right, and that mounting a coupled inductor and paying attention to the duty cycle difference will solve these problems.
I will try to post some photos of the primary switching waveform for you to see it: I am only a bit worried about what's happening the portion of time that both mosfets are off, where you can see some damped ringing (I have to measure the freq. but it is several MHz for sure), with around 80Vp-p maximum amplitude. I don't know if that's dangerous or causes dissipation, or if it should be corrected before going to higher power testing.

Best regards
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Old 25th August 2005, 07:25 PM   #17
Pierre is offline Pierre  France
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Unfortunately, my mosfets have exploded again, as soon as I have increased output power from aroun 100W to about 170W. Now I had 2sk2141, 6A/500V, more than enough for that power.

I attach a figure of the switching waveform when it worked (100W output, worked fine and everything cool), with around 20% duty cycle. It is something strange, isn't it? Y scale is 50V/div, X scale is 2us/div

What can be the cause of the violent explosion (they weren't hot, in fact they exploded just when I plugged the supply)? I am quite puzzled.
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File Type: jpg primary_voltage_100w.jpg (53.7 KB, 264 views)
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Old 25th August 2005, 07:51 PM   #18
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This has been a very interesting discussion so far! (Sorry, Pierre, for all the smoke...)

I would perhaps suspect the MOSFET drive circuitry and check that out once again. The IR2110 type driver parts are very picky to set up correctly. I've tried to use them before and ended up going with a transformer drive which is much easier to deal with (to me, at least). If the IR part is not bypassed REALLY well and everything with nice tight loops, you may be getting ringing above or below the Vgs limit of the FETs(usually around +/-30V). The layout problems (if there are any) and ringing will increase when you start to increase the load.

If your FET's blew at turn on, maybe you had FET cross-conduction because of the driver chip not establishing a stable operating point yet. If I recall correctly, though, the chip has UVLO, so would not have turned on without an adequate voltage. Strange indeed...

Something to think about...

I'm curious about the ringing in your picture, too, and hope someone (Eva ) can shed some light on that.

Matt.
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Old 25th August 2005, 08:29 PM   #19
Eva is offline Eva  Spain
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The waveform looks right. It shows discontinuous mode operation. Output inductors are charged during the on time, then they discharge during the part in wich voltage rests at center (inductors are effectively shorting the secondaries), and then the transformer is left free so it tends to reset from the previous cycle but the discharged inductors in the secondary side clamp the voltage.

As carvinguy said, this may be an issue with gate drive and resonance peaks exceeding maximum Vgs rating, thus punctuting metal oxide gate isolation and inmediately destroying the device (and the gate driver IC).

It may be also an issue with continuous conduction mode and secondary side diode reverse recovery, since according to the 100W waveform 170W semms like a bit past the continuous mode boundary. Note that if there is a gate drive issue, it may arise only in these circumstances.

You will need to connect oscilloscope probe directly at MOSFET terminals and build an improvised common-mode filter for the probe like the ones shown in the picture in order to get an accurate picture of gate drive waveforms.

Click the image to open in full size.
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Old 25th August 2005, 09:16 PM   #20
Danko is offline Danko  Hungary
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Can it possible, that the high-side floating supply (bootstrap-capacitor) can't charge fast enough, and the low side FET is already switching, while the upper side mosfet does nithing, becouse the bootstrap-capacitor isn;t charged up properly, and the IR2110's UVLO protection is disabling the ouput?

ups, nice sentence
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