I have designed and built a new full bridge PCB. This is how it looks:
Final layout:
Partial unfinished layout (placing the storage capacitors on the other side produced better matched track lenghts between each phase of the full bridge, thus providing more symmetrical drive to the transformer):
Final layout in detail. Q5, Q6, Q7 and Q8 are not switching devices, they are auxiliar 60V 4A PNP transistors used by the base drive circuit. I will show the schematic of the "base drive cell" later:
Etched PCB (I had to use two joint pieces since I ran out PCB material):
Detail of the magnetic snubbers that I use both to get a precise measurement of collector current of each transistor and to prevent reverse biasing and parasitistic turn-on of them. Initially I used 1:7 turns but that was not enough to prevent core saturation, so I increased it to 3:21 turns and it worked fine:
Detail of the 10uF 10V SMD ceramic capacitors that I use for base drive, they are tiny yet they feature very low ESR and no ripple current constraints. They are subject to repetitive peak currents in excess of 6A and don't complain:
Overall view with most components mounted. The base drive transformer is intentionally shifted to the left in order to make the PCB tracks of the right side longer and increase their resistance, with the purpose of compensating an inherent transformer winding asymmetry issue that forces the magnet wires of the right side to be a bit longer (Currently I have replaced that EF20 transformer by a bigger ETD29 since magnetizing inductance was too low. The asymmetry issue remains but requires far less compensation. I will explain in detail later):
Detail of mains diode bridge, that was quite an improvisation since I hadn't any suitable heatsink and I had very little available PCB space:
Overall view with all components mounted and ready for testing:
Another overall view, note how bulky the mains rectification section has become in order to power a 2KW load with reasonable ripple in the +300V bus. The EMI filter is also shown, a common mode choke and a 470nF capacitor appear to be more than enugh to prevent any line interference:
Another more overall view. I have placed the resistors from the RC turn-off snubbers in the "wind tunnel" side so that more than 2W could be dissipated in conventional low-cost 2W units without overheating.
Final layout:
An externally hosted image should be here but it was not working when we last tested it.
Partial unfinished layout (placing the storage capacitors on the other side produced better matched track lenghts between each phase of the full bridge, thus providing more symmetrical drive to the transformer):
An externally hosted image should be here but it was not working when we last tested it.
Final layout in detail. Q5, Q6, Q7 and Q8 are not switching devices, they are auxiliar 60V 4A PNP transistors used by the base drive circuit. I will show the schematic of the "base drive cell" later:
An externally hosted image should be here but it was not working when we last tested it.
Etched PCB (I had to use two joint pieces since I ran out PCB material):
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Detail of the magnetic snubbers that I use both to get a precise measurement of collector current of each transistor and to prevent reverse biasing and parasitistic turn-on of them. Initially I used 1:7 turns but that was not enough to prevent core saturation, so I increased it to 3:21 turns and it worked fine:
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
Detail of the 10uF 10V SMD ceramic capacitors that I use for base drive, they are tiny yet they feature very low ESR and no ripple current constraints. They are subject to repetitive peak currents in excess of 6A and don't complain:
An externally hosted image should be here but it was not working when we last tested it.
Overall view with most components mounted. The base drive transformer is intentionally shifted to the left in order to make the PCB tracks of the right side longer and increase their resistance, with the purpose of compensating an inherent transformer winding asymmetry issue that forces the magnet wires of the right side to be a bit longer (Currently I have replaced that EF20 transformer by a bigger ETD29 since magnetizing inductance was too low. The asymmetry issue remains but requires far less compensation. I will explain in detail later):
An externally hosted image should be here but it was not working when we last tested it.
Detail of mains diode bridge, that was quite an improvisation since I hadn't any suitable heatsink and I had very little available PCB space:
An externally hosted image should be here but it was not working when we last tested it.
Overall view with all components mounted and ready for testing:
An externally hosted image should be here but it was not working when we last tested it.
Another overall view, note how bulky the mains rectification section has become in order to power a 2KW load with reasonable ripple in the +300V bus. The EMI filter is also shown, a common mode choke and a 470nF capacitor appear to be more than enugh to prevent any line interference:
An externally hosted image should be here but it was not working when we last tested it.
Another more overall view. I have placed the resistors from the RC turn-off snubbers in the "wind tunnel" side so that more than 2W could be dissipated in conventional low-cost 2W units without overheating.
An externally hosted image should be here but it was not working when we last tested it.
This is the base-drive cell:
When the switching transistor is turned on, the drive transformer provides as a base current 1/5th of whatever collector current is flowing. That 10uF capacitor is charged to two diode drops (1.2V), then the PNP transistor starts conducting and the 10uF capacitor charges further depending on the voltage drop that the base drive current causes across the 1ohm resistor (2V for Ic=10A).
At the end of the cycle, the drive transformer is shorted and base current progressively changes from being sourced into being sunk at a slope controlled by the leakage inductance of the transformer. That slope has a optimum value that produces the smallest collector tail current and the most abrupt increase in Vce, yielding the lowest losses. The peak negative base current is not only limited by leakage inductance, but also by the 0.3ohm resistor (three 1ohm in paralell) and the voltage across the 10uF capacitor, so that it has a minimum value that increases for increasing collector current levels.
When the switching device is turned off, the PNP transistor prevents the 10uF capacitor from discharging through the 1ohm resistor. This means that duty cycle doesn't affect the amount of negative base current available at turn-off, it only depends on actual collector current wich is highly desirable. For converters operating at almost fixed duty cycles this PNP transistor may be safely replaced by one or two 1N4001 diodes (in fact, it's not included in AT nor ATX power supplies), however, I want the output to be reliably adjustable.
The 1K resistor prevents parasitistic turn-on due to the inherently high leakage currents present in high voltage bipolar transistors, and the 47 ohm resistor speeds up the turn-off of the PNP auxililiary transistor. Finally, the RC network provides some damping for ringing and spikes.
This piece of schematic illustrates the magnetic snubber scheme in use (NOTE: These transformers are shown with the wrong polarity, one of the windings should have the point in the opposite terminal. Sorry):
Each transformer prevents reverse biasing of the corresponding bipolar switch, wich is required because clamping diodes are not fast enough to prevent some degree of reverse biasing and reverse turn-on of the switching transistor (remember that bipolar devices also work with E and C pins exchanged, but in a clumsy and very slow way, causing a long current tail after the spike). Additional clamping diodes are included in order to protect the bipolar transistors from leakage inductance spikes produced by the own snubbers.
The 1:7 ratio was chosen because it allows to use a small 1A diode in the secondary side while still keeping to a minimum extent the diode capacitance multiplicacion effect that the transformer provides. With too much reflected capacitance the snubber would show a low impedance and would fail to prevent reverse biasing.
That sample of 1/7th of collector current is further employed to measure output current as that schematic shows (these ones have the right polarity):
The 1/7th of Ic sample is summed with the sample from the partner transistor by means of an additional 1:1:28 current transformer, thus obtaining a 1/100th (actually 1/98th) sample of main transformer primary current. Cascode transistors are employed in the secondary side in order to keep voltage across the transformer below 1V for all current levels, thus allowing to use very small ferrite cores while still obtaining a gentle 1V/1A noise-free signal.
(More to come).
An externally hosted image should be here but it was not working when we last tested it.
When the switching transistor is turned on, the drive transformer provides as a base current 1/5th of whatever collector current is flowing. That 10uF capacitor is charged to two diode drops (1.2V), then the PNP transistor starts conducting and the 10uF capacitor charges further depending on the voltage drop that the base drive current causes across the 1ohm resistor (2V for Ic=10A).
At the end of the cycle, the drive transformer is shorted and base current progressively changes from being sourced into being sunk at a slope controlled by the leakage inductance of the transformer. That slope has a optimum value that produces the smallest collector tail current and the most abrupt increase in Vce, yielding the lowest losses. The peak negative base current is not only limited by leakage inductance, but also by the 0.3ohm resistor (three 1ohm in paralell) and the voltage across the 10uF capacitor, so that it has a minimum value that increases for increasing collector current levels.
When the switching device is turned off, the PNP transistor prevents the 10uF capacitor from discharging through the 1ohm resistor. This means that duty cycle doesn't affect the amount of negative base current available at turn-off, it only depends on actual collector current wich is highly desirable. For converters operating at almost fixed duty cycles this PNP transistor may be safely replaced by one or two 1N4001 diodes (in fact, it's not included in AT nor ATX power supplies), however, I want the output to be reliably adjustable.
The 1K resistor prevents parasitistic turn-on due to the inherently high leakage currents present in high voltage bipolar transistors, and the 47 ohm resistor speeds up the turn-off of the PNP auxililiary transistor. Finally, the RC network provides some damping for ringing and spikes.
This piece of schematic illustrates the magnetic snubber scheme in use (NOTE: These transformers are shown with the wrong polarity, one of the windings should have the point in the opposite terminal. Sorry):
An externally hosted image should be here but it was not working when we last tested it.
Each transformer prevents reverse biasing of the corresponding bipolar switch, wich is required because clamping diodes are not fast enough to prevent some degree of reverse biasing and reverse turn-on of the switching transistor (remember that bipolar devices also work with E and C pins exchanged, but in a clumsy and very slow way, causing a long current tail after the spike). Additional clamping diodes are included in order to protect the bipolar transistors from leakage inductance spikes produced by the own snubbers.
The 1:7 ratio was chosen because it allows to use a small 1A diode in the secondary side while still keeping to a minimum extent the diode capacitance multiplicacion effect that the transformer provides. With too much reflected capacitance the snubber would show a low impedance and would fail to prevent reverse biasing.
That sample of 1/7th of collector current is further employed to measure output current as that schematic shows (these ones have the right polarity):
An externally hosted image should be here but it was not working when we last tested it.
The 1/7th of Ic sample is summed with the sample from the partner transistor by means of an additional 1:1:28 current transformer, thus obtaining a 1/100th (actually 1/98th) sample of main transformer primary current. Cascode transistors are employed in the secondary side in order to keep voltage across the transformer below 1V for all current levels, thus allowing to use very small ferrite cores while still obtaining a gentle 1V/1A noise-free signal.
(More to come).
No, the transformer is shorted in its secondary winding by means of two MOSFETs.
I'be veen considering a new system for some time, where these MOSFETs would be placed directly in the base drive cell, but it requires a pulse transformer for gate drive and another transformer to provide gate power to all the cells, so that the system can stay turned off. Also, a third pulse transformer would be required to drive four additional MOSFETs for my "saturation boost" system (I will explain it later).
On the other hand, I've solved most of the issues that I had with fully transformer-coupled base drive, except the inherently limited base-current rise slope at the begginning of the cycle, that slows down saturation (transformer voltage is clamped in the secondary side in order to protect the reverse biased B-E junctions from excessive breakdown current). However, reducing leakage inductance by adding more layers to the transformer increases turn-off losses.
Finally, I have the full-MOSFET alternative: SPP20N60S5 from Infineon. With eight units of these (four groups of two) I would get the same conduction losses as with bipolars, with slightly lower turn-on losses and similar turn-off losses. However, I would have to drive eight 4nF gates, thus requiring something like eight 2A gate buffers, and each of these devices would cost me almost as much as 4 bipolar transistors. (And in these circumstances IGBTs have little or no advantages over bipolar transistors).
I'be veen considering a new system for some time, where these MOSFETs would be placed directly in the base drive cell, but it requires a pulse transformer for gate drive and another transformer to provide gate power to all the cells, so that the system can stay turned off. Also, a third pulse transformer would be required to drive four additional MOSFETs for my "saturation boost" system (I will explain it later).
On the other hand, I've solved most of the issues that I had with fully transformer-coupled base drive, except the inherently limited base-current rise slope at the begginning of the cycle, that slows down saturation (transformer voltage is clamped in the secondary side in order to protect the reverse biased B-E junctions from excessive breakdown current). However, reducing leakage inductance by adding more layers to the transformer increases turn-off losses.
Finally, I have the full-MOSFET alternative: SPP20N60S5 from Infineon. With eight units of these (four groups of two) I would get the same conduction losses as with bipolars, with slightly lower turn-on losses and similar turn-off losses. However, I would have to drive eight 4nF gates, thus requiring something like eight 2A gate buffers, and each of these devices would cost me almost as much as 4 bipolar transistors. (And in these circumstances IGBTs have little or no advantages over bipolar transistors).
If you shorten the secondary: How does the leakage inductance
affect the negative base current?
Two Mosfets?
...do I see a center tapped secondary?
SPP20N60S5:
a) ...you found it
b) This one might match even better :IPP60R099CS
http://www.infineon.com/upload/Document/cmc_upload/documents/012/2833/IPP60R099CS_rev1.1.pdf
c)Yes, your bipolar design seems to be perfectly competitive in technical terms. Competitive vs. top rated expensive MosFets!
And as your are not going to produce millions of SMPS, you don't need to fear the tolerances of the BJT storage time or any other components.
affect the negative base current?
Two Mosfets?
...do I see a center tapped secondary?
SPP20N60S5:
a) ...you found it
b) This one might match even better :IPP60R099CS
http://www.infineon.com/upload/Document/cmc_upload/documents/012/2833/IPP60R099CS_rev1.1.pdf
c)Yes, your bipolar design seems to be perfectly competitive in technical terms. Competitive vs. top rated expensive MosFets!
And as your are not going to produce millions of SMPS, you don't need to fear the tolerances of the BJT storage time or any other components.
Do you have distributor for those if I want to buy less than 500pcs?ChocoHolic said:SPP20N60S5:
a) ...you found it
b) This one might match even better :IPP60R099CS
http://www.infineon.com/upload/Document/cmc_upload/documents/012/2833/IPP60R099CS_rev1.1.pdf
IPW60R045 seems also intresting but samesame problem, i can find only 240 pcs. min order and 14 euros apiece
As opposed to low voltage ones, high voltage MOSFETs are quite expensive those days and prices don't seem to fall... rather they rise
Also, paralelling is almost always required for high power applications, thus multiplying the cost. I don't understand why engineers insist in using them everywhere, even in those designs that doesn't require extremely fast switching (like mine).
Also, paralelling is almost always required for high power applications, thus multiplying the cost. I don't understand why engineers insist in using them everywhere, even in those designs that doesn't require extremely fast switching (like mine).
Eva said:As opposed to low voltage ones, high voltage MOSFETs are quite expensive those days and prices don't seem to fall... rather they rise
Also, paralelling is almost always required for high power applications, thus multiplying the cost. I don't understand why engineers insist in using them everywhere, even in those designs that doesn't require extremely fast switching (like mine).
Going to be SERIOUS power supply if someone needs to parallei IPW60R045's
Yeah, mosfet prices seems getting higher, but look what you get compared to old-fashioned mosfets...
IRFP460 vs. IPW60R045
Qg 210nC vs. 190nC
rdson 270mohm vs. 45mohm!
Similar(little better) gate charge but one-sixth on-resistance.
Or more reasonable comparision between IPP60R199CP similar rds-on competitor, 190 mohms and 43nC
Might be worth of couple of extra $$ as gate drivers can be minuscule compared to IRFP460
----
I guess engineers are scared of relatively complex lookalike base drive and bigger assembly/parts cost. On the other hand almost all AT/ATX power supplies are with NPN-bipolars, so they still have their places....
Eva said:As opposed to low voltage ones, high voltage MOSFETs are quite expensive those days and prices don't seem to fall... rather they rise
Also, paralelling is almost always required for high power applications, thus multiplying the cost. I don't understand why engineers insist in using them everywhere, even in those designs that doesn't require extremely fast switching (like mine).
I guess there are several reasons for the
preferred use of the MosFets, also in slower applications:
1.) You don't need continuosly high drive currents.==> Less system complexity, because proper base drive without transformer is often
difficult.... (and base drive with transformer is always difficult for less freaky people...
)2.) Avoiding trouble with different storage times of different production lots.
3.) Integrated body diode helps to reduce the system complexity.
4.) Usually quite comfortable SOA, while with BJTs you have to look about 2ndary breakdown. Also max. voltage rating depending on the base drive.
5.) Avoiding trouble with reduced current gain at high currents.
But I agree that BJTs are still often a good choice. Not only regarding price. Also the losses at higher currents are quite attractive.
And in fact they are often used in switching applications!
ATX PSUs
Lighting (sometimes)
Motor Drives (OK, IGBT...)
With these bipolar transistors, SOA and RBSOA are no longer a concern, check these figures:
Forward bias SOA is almost square for pulses up to 10uS, so it's quite hard to exceed, not only during turn-on, but even during transient overload conditions where not enough saturation is achieved. Actually, the current limiting feature of the older 1KW voltage-mode control circuit wasn't working properly and it was allowing for 25A transients without bipolar transistors failing.
Also, reverse bias SOA only applies during crossover and fall periods, when the base junction is reverse biased and the device is still conducting. However, proper base drive and RC snubbering of the inductive load actually allow to safely ignore RBSOA:
First: The 33 ohm and 2nF snubber (actually 25 ohm) across the transformer increases full-load crossover time from approx 40ns to 100ns, so with a 250V supply it is still capable of sinking all the current from transformer leakage inductance. And the higher the supply voltage the more current it can sink, thus ensuring that bipolar transistors stop conducting far before the voltage reaches the opposite rail, for I'm considering a PFC front-end with 400V rails to ultimately extend output current to 180A or 200A.
Second: The leakage inductance of the base drive transformer provides a nice -12V peak (actually clamped by reverse breakdown of the base-emitter junction) during the entire crossover period and even longer. Actually, the maximum posible reverse bias voltage is guaranteed for loads above 50% (Ic=5A and up).
This means that turn-off is safe even for Ic=20A, while average current limiting prevents it from switching more than 11A average, and an auxiliary peak current comparator with slope compensation prevents peak currents over 14A during fault conditions. It has even survived shorted transformer secondaries for several seconds from time to time.
As opposed to all those common myths about bipolar transistors, my only concern about them is currently excessive turn-on losses due to slow saturarion and inherent limitations in the transformer-coupled base drive scheme.
I will post some captures from the oscilloscope soon...
An externally hosted image should be here but it was not working when we last tested it.
Forward bias SOA is almost square for pulses up to 10uS, so it's quite hard to exceed, not only during turn-on, but even during transient overload conditions where not enough saturation is achieved. Actually, the current limiting feature of the older 1KW voltage-mode control circuit wasn't working properly and it was allowing for 25A transients without bipolar transistors failing.
Also, reverse bias SOA only applies during crossover and fall periods, when the base junction is reverse biased and the device is still conducting. However, proper base drive and RC snubbering of the inductive load actually allow to safely ignore RBSOA:
First: The 33 ohm and 2nF snubber (actually 25 ohm) across the transformer increases full-load crossover time from approx 40ns to 100ns, so with a 250V supply it is still capable of sinking all the current from transformer leakage inductance. And the higher the supply voltage the more current it can sink, thus ensuring that bipolar transistors stop conducting far before the voltage reaches the opposite rail, for I'm considering a PFC front-end with 400V rails to ultimately extend output current to 180A or 200A.
Second: The leakage inductance of the base drive transformer provides a nice -12V peak (actually clamped by reverse breakdown of the base-emitter junction) during the entire crossover period and even longer. Actually, the maximum posible reverse bias voltage is guaranteed for loads above 50% (Ic=5A and up).
This means that turn-off is safe even for Ic=20A, while average current limiting prevents it from switching more than 11A average, and an auxiliary peak current comparator with slope compensation prevents peak currents over 14A during fault conditions. It has even survived shorted transformer secondaries for several seconds from time to time.
As opposed to all those common myths about bipolar transistors, my only concern about them is currently excessive turn-on losses due to slow saturarion and inherent limitations in the transformer-coupled base drive scheme.
I will post some captures from the oscilloscope soon...
These are the captures:
Switching waveforms at idle, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div.
Switching waveforms with approx. 60A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div. The bus voltage drops badly due to my isolation transformers. Note the big spike due to the RC snubber.
Switching waveforms with approx. 125A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div. It was captured very quickly after the load was switched in order to avoid showing extreme voltage drop.
Detail of turn-off waveforms with approx. 115A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 200ns/div. This one shows the huge bus voltage drop due to loading 1KVA transformers with 1,8KW of rectified load. Note that the apparent current tail is not due to the bipolar devices at all, actually they stop conducting quite quickly, instead the tail is just a measurement artifact caused by the magnetic snubbers being trapped between two diodes (it disappears if the inner clamping diode diode is removed). This capture also shows losses due to slow saturation, an issue that comes more from the limitations of the single transformer base drive approach than from the nature of the bipolar devices themselves.
An externally hosted image should be here but it was not working when we last tested it.
Switching waveforms at idle, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div.
An externally hosted image should be here but it was not working when we last tested it.
Switching waveforms with approx. 60A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div. The bus voltage drops badly due to my isolation transformers. Note the big spike due to the RC snubber.
An externally hosted image should be here but it was not working when we last tested it.
Switching waveforms with approx. 125A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 5us/div. It was captured very quickly after the load was switched in order to avoid showing extreme voltage drop.
An externally hosted image should be here but it was not working when we last tested it.
Detail of turn-off waveforms with approx. 115A output, red trace is collector voltage at 50V/div, blue trace is measured current at 2A/div, timebase is 200ns/div. This one shows the huge bus voltage drop due to loading 1KVA transformers with 1,8KW of rectified load. Note that the apparent current tail is not due to the bipolar devices at all, actually they stop conducting quite quickly, instead the tail is just a measurement artifact caused by the magnetic snubbers being trapped between two diodes (it disappears if the inner clamping diode diode is removed). This capture also shows losses due to slow saturation, an issue that comes more from the limitations of the single transformer base drive approach than from the nature of the bipolar devices themselves.
An externally hosted image should be here but it was not working when we last tested it.
Base waveforms with approx. 125A output, red trace is base-emitter voltage at 2V/div, blue trace is measured current at 2A/div, timebase is 5us/div. Note the negative peak at turn-off and the clamped peak at turn-on that is limiting the base current rise slope and slowing down saturation (clamping comes from the pair of MOSFETs with Vds=55V maximum that short the base drive transformer, whose turn ratio is 7:1, altough I'm considering leaving the poor BE junctions clamping those peaks alone).
An externally hosted image should be here but it was not working when we last tested it.
Detail of base waveforms with approx. 125A output, red trace is base-emitter voltage at 2V/div, blue trace is measured current at 2A/div, timebase is 200ns/div. Note the 12V negative base voltage peak that ensures the best RBSOA possible.
An externally hosted image should be here but it was not working when we last tested it.
Base waveforms with approx. 125A output, red trace is base-drive cell current (including the damping RC network) at 1.5A/div, blue trace is measured current at 2A/div, timebase is 5us/div. Note the negative Ic/2 peak with controlled slope at turn-off, and also the positive peak generated by my "saturation-boost" circuit at the beginning of the cycle, that does not rise fast enough in order to reduce the "on resistance" of the bipolar transistors quickly enough.
Blue trace is the current measured through the magnetic snubbers, it's rectified due to the topology of the measurement system and it includes the current from the primary winding of the main transformers, the current from the RC snubber and the clamping tail from the inner emitter/collector diode. The trace itself is the voltage drop across the 100 ohm resistor that is connected to the collectors of the cascode transistors.
Multiply that value from the blue trace by 12 and you will get secondary winding current, and output inductor current will have almost the same value, except by the peak at the beginning of the cycle caused both by RC snubbers and by the slight clumsyness of low-cost MOSFETs used as synchronous rectifiers (those actually suffer from tail currents!!)
Actually, the voltage from this blue trace is fed directly to the auxiliary peak current comparator, and it's also further processed in order to simulate the inductor current downslope and finally it's fed to the average current amplifier that controls duty cycle and to the "synchronous rectification enable" comparator.
Multiply that value from the blue trace by 12 and you will get secondary winding current, and output inductor current will have almost the same value, except by the peak at the beginning of the cycle caused both by RC snubbers and by the slight clumsyness of low-cost MOSFETs used as synchronous rectifiers
(those actually suffer from tail currents!!)Actually, the voltage from this blue trace is fed directly to the auxiliary peak current comparator, and it's also further processed in order to simulate the inductor current downslope and finally it's fed to the average current amplifier that controls duty cycle and to the "synchronous rectification enable" comparator.
...I really love this base drive.
But I am not sure if I would dare to implement your proposal
of a 400V PFC rail and 180A output at the same time.
Directly after BJT turn OFF, when Uce wheels up (worst case over shoot up to full rail) the Ube is just kept around zero by a resistor.
The negative base drive peak is available until Ic has sloped down, but not longer. Your pictures do not exactly show Ube and Uce, but I would guess that max. Uce overshoot takes place about 100ns-200ns after Ic has sloped down. Then during this overshoot probably no negative base drive is available anymore.
At higher rail voltages the BJT might need some ongoing neg base drive until Uce overshoot has calmed down in order to overcome
internal BJT leakage (above 350V) and capacitive impact from Uce sloping to Ube.
...may be I am a coward...
But I am not sure if I would dare to implement your proposal
of a 400V PFC rail and 180A output at the same time.
Directly after BJT turn OFF, when Uce wheels up (worst case over shoot up to full rail) the Ube is just kept around zero by a resistor.
The negative base drive peak is available until Ic has sloped down, but not longer. Your pictures do not exactly show Ube and Uce, but I would guess that max. Uce overshoot takes place about 100ns-200ns after Ic has sloped down. Then during this overshoot probably no negative base drive is available anymore.
At higher rail voltages the BJT might need some ongoing neg base drive until Uce overshoot has calmed down in order to overcome
internal BJT leakage (above 350V) and capacitive impact from Uce sloping to Ube.
...may be I am a coward...
I explained it previously. There are 1.2V of permanent negative base bias during dead time, plus up to 2 additional volts for Ic=10A. This means that after the -12V peak the waveform rests at approx -3.2V, not 0V.
Also remember that the collector voltage rise is heavily slowed down by the RC snubber, the transistors stop conducting at all when the collector voltage is still half way to the opposite rail.
And note that for RBSOA it's collector current what matters. After Ic has dropped to zero, the device can sustain 700V of Vce as long as its base is kept at the the same or a lower potential than the emitter.
Also remember that the collector voltage rise is heavily slowed down by the RC snubber, the transistors stop conducting at all when the collector voltage is still half way to the opposite rail.
And note that for RBSOA it's collector current what matters. After Ic has dropped to zero, the device can sustain 700V of Vce as long as its base is kept at the the same or a lower potential than the emitter.
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.