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Old 5th July 2005, 09:28 PM   #11
Eva is offline Eva  Spain
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The first step is allways to get the switching and EMI stuff right, then you can mess with the regulation loop.

Do you own an oscilloscope? Trying to do SMPS experimentation without one is like being deaf and blind. Waveforms will always tell you if your circuit is working properly or not.
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Old 5th July 2005, 09:34 PM   #12
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Quote:
Originally posted by djQUAN
in a normal SMPS there should be no sound. is the sound that you hear more like a whistle? if so, the cores or the windings are vibrating which is not a good thing. have you seen the input/output waveforms of the transformer?

A hint of complication....I agree with Eva ....But above comment not always true........some traditional smps circuits will run into burst mode when output is unloaded.....in otherwords the duty cycle can run cyclic undefined in very narrow pulse widths. There's nothing wrong in this other than the slight sizzling noise......however in some toplogies (e.g phase shifted ZVT) is highly dangerous practice. The off-load condition is a severe test for smps stability. In telecom apps this is a standard compliance test.

If the inner current loop in current mode operation has no real current to measure other than nagnetising current the oscillator ramp cannot follow the inductor current.....(because it's near nil) so narrow waveform jitter can result. simple
In Voltage mode, a definite and distinctive squeal spells trouble could be due to core saturating as switching cycles are never quite equal per push pull half or as the outer regulation loop has a badly designed r/c filter pole. This is also true for current mode.

Viewing the inner loop current ramp waveform on a scope is like heart diagnosis for humans........can show up alot of evils.


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Old 6th July 2005, 04:33 PM   #13
djQUAN is offline djQUAN  Philippines
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sorry, I wasn't very clear. I was referring to an unregulated SMPS since those are what I've had most experience with.
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Old 6th July 2005, 04:38 PM   #14
Todor is offline Todor  Bulgaria
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Yes, i have a 15MHz oscilloscope, which should be sufficient for the purpose. I have seen the primary waveform but some kind didn't like it. I am on my way of puting isolation transistors between the 494 and the fets if this could help something.
Now i have other troubles around the car and this will wait some time
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Old 6th July 2005, 04:52 PM   #15
Todor is offline Todor  Bulgaria
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Could someone tell me where i can find various pictures of oscilloscope waveforms taken from the trafo so i can have some sort of reference to which i can compare my results?
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Old 7th July 2005, 08:33 AM   #16
djQUAN is offline djQUAN  Philippines
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the waveforms should be a perfect square wave. since I never use snubber circuits, some minor ringing can be allowed (but ringing makes the whole PSU from a little to a lot less efficient so you want as little ringing as possible.)
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Old 13th July 2005, 11:54 PM   #17
Todor is offline Todor  Bulgaria
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Is it normal to have some current of about 0.5A on the 14V when the ps is not loaded, the resistors in the primary of the trafo are getting very hot.
what should be the current at idle?
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Old 15th July 2005, 04:52 PM   #18
Eva is offline Eva  Spain
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500mA is a bit on the high side, 100 to 250mA would be more usual.

Something may be wrong, but I would need to see the circuit and gate/drain switching waveforms in order to know what's going on.

You can detect transformer saturation by looking at drain waveforms during turn-off with a light load (1 to 5 watts). In case of saturation, the drain voltage of one side will spring like hell to 30..60V and will show substantial ringing (this means that there was a big current flowing before turn-off), while the drain voltage of the other side will rise slower and to a lower value, and will show less ringing (this means that there was almost no current flowing).

If both drains spring and ring violently even with light load, it usually means that saturation is happening in both directions, so either frequency or primary turn counts have to be increased.

You should also check the existence of dead time. Use a very light load (1 watt or so) and look at drain turn-off waveform of one side versus gate waveform of the other side (dual oscilloscope required). Ensure that, just after turn-off, the drain voltage of each of the MOSFET sets has had at least 250ns to rise freely before the other side starts turning on. Add more dead time if required. Rise times will decrease for higher loads so this guarantees proper dead time in all circumstances. Enhancing gate drive may reduce rise times and allow for smaller dead times.

This free rising period is critical for proper flux balancing of the transformer. It corrects flux imbalance because a higher magnetizing current causes a faster voltage rise, so slightly less volts*second are applied in that direction and more are applied in the other, thus automatically balancing the flux. Adding snubbers linearises the capacitance seen by each primary leg, so it actually enhances flux balancing, note that MOSFETs show very non-linear output capacitances. It's a quite subltle and unknown mechanism but it works fine.
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Old 15th July 2005, 11:43 PM   #19
Todor is offline Todor  Bulgaria
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Hi Eva, I am still a beginner in this kind of stuff that is why I came here to ask those who know it. I am experiencing a problem i cannot understand but still have the hope that sooner or later I will.
I tried to unplug the fets and see with the oscilloscope what happens on the output of the 494 unloaded.
I saw a perfect picture of what should be seen there. Sorry for the handwork since I don't have a camera here.
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File Type: jpg perfect.jpg (2.6 KB, 191 views)
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Old 15th July 2005, 11:47 PM   #20
Todor is offline Todor  Bulgaria
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I put a variable resistor on the DTC pin 4 between the reference aregulator and GND to manage the dead time, which was quite clear adjusting when no fets where connected to the IC. When i put them I got something like this on the gates:
I don't know if this is right, may be it is not thus i hoped to see the same wave and not this.
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File Type: jpg gate.jpg (3.6 KB, 189 views)
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