Finished capacitance multiplier

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
I've completed the capacitance multiplier first proposed in a previous thread. The final design is pretty much the same as the original. It's intended to supply the output stage of the subwoofer amplifier I'm currently working on.

Information and pictures concerning the capacitance multiplier can be found on my website.

Additionally, there is a simple regulated supply to go with it, also described on my website.

It works rather well. It's certainly tougher than my poor abused dummy load resistors:hot:

For those too lazy to click a link I've attached a photo of it to this post.
 

Attachments

  • psu2_photo.jpg
    psu2_photo.jpg
    60.5 KB · Views: 7,980
Last edited:
2pist said:
um, I like it..... what does it do?
A capacitance multiplier is similar to a voltage regulator, but instead of maintaining the output at a fixed voltage, it keeps it at a proportion of the input voltage, similar to how a very large capacitor would work.



padamiecki said:
hello!
are you realy evil?
by the way, some people say that non global nfb psu is the best,
did you try it?
Am I really evil? Opinions differ. Some would say yes, some would think it impossible ;)

The usual, simple capacitance multiplier has no global feedback. It's not as good as this more complex circuit, which needs NFB to keep output impedance low.



Yoghourt said:
Hello mr evil,

Why 4700uF at supply output? What does this PSU typically drives? (type of load, typical current ratings, decoupling/bypassing).
The schematic of the prototype had 4700uF, the final version (in the third link, which could probably have been better marked as the 'main' link) has 100u at the output. I experimented with various values and found that high values improve impulse response but do nothing for ripple. This PSU is used to power a low-power amplifier which has its own 1000u local bypassing. Load current would be about 3A rms at most. The purpose of the PSU is low ripple, since the speakers are high sensitivity. It's overpowered for this, but as such it provides good experience for future applications.
 
Impressive PS design, and even the PCB topology is present... :) :up:

But if I for exapmle need it to work at +/- 60 Volts, must I replace only the pass transistors or the whole circuit is to be recalculated (I mean the resistors, capacitors etc...)? What maximum on-RDS for the pass FET would you recommend?
 
padamiecki said:
so, it is better than other, because of lower impedance and more complexity?
Do you have any comparsion?
I didn't mean it had lower output impedance than the simple design, I meant that it has to have NFB to avoid the output impedance being too high. I don't remember which had the lowest impedance, but both are low enough. The advantages of this design are lower dropout voltage and lower ripple for a given RC filter capacitance or smaller capacitance for the same ripple (by about 1000x).



Dark Harroth said:
Impressive PS design, and even the PCB topology is present... :) :up:

But if I for exapmle need it to work at +/- 60 Volts, must I replace only the pass transistors or the whole circuit is to be recalculated (I mean the resistors, capacitors etc...)? What maximum on-RDS for the pass FET would you recommend?
The pass transistors must withstand full input voltage, so they will need to be replaced. Choose ones with the lowest Rdson you can find as it limits dropout voltage/efficiency. The LTP MOSFETs and BJTs likewise need to withstand full input voltage. The CCS JFETs have 1.5x full input voltage across them. I don't know if you'll find ones that can take 90V+, so you'll need another type of CCS (a simple resistor will do). The rest of the circuit should be suitable without changes.
 
Mr Evil said:
The CCS JFETs have 1.5x full input voltage across them. I don't know if you'll find ones that can take 90V+, so you'll need another type of CCS (a simple resistor will do).
Somehow I feel that a JFET would be better, but the only ones that can handle such a high voltage are Soviet-made (and these ones have to be properly matched, because their parameters can differ from each other for more than 20%).
So I have an another question (a stupid one I should say), can I put three JFET CCS in series to obtain a 150-volt limit?
If not, what resistor should I use for +/- 60 Volts as a replacement, a 60/0.0053=11,5K one?
 
Hi,
How could you incorporate a current limit into the PSU?
Even better if this was foldback?
Could you explain, in detail, the function of C7, it appears to be passing output ripple straight back to LTP. I've seen this in other circuits. What specs determine it's effectiveness?
Why take the CCS to the opposite Vrail? Could they be returned to ground instead?
What is the RC time constant for c5? R1//R2 *C5 or other?
Have you simulated reduced values for C1&2? What happens?
Why do I want current limit;- to avoid catastrophic failure downstream and also to slow charge downstream capacitance. I'm still thinking ClassA.
 
Dark Harroth said:

Somehow I feel that a JFET would be better, but the only ones that can handle such a high voltage are Soviet-made (and these ones have to be properly matched, because their parameters can differ from each other for more than 20%).
So I have an another question (a stupid one I should say), can I put three JFET CCS in series to obtain a 150-volt limit?
If not, what resistor should I use for +/- 60 Volts as a replacement, a 60/0.0053=11,5K one?
AndrewT's post quoted below reminded me of something I should have mentioned before: You could connect the CCS to ground instead of the opposite rail. This is how I originally had it in the first prototype I tested, but I changed it for smoother turn-on*. This reduces the voltage requirements to only half the input voltage, bringing it back within the realm of commonly available parts.

None of the components in this circuit need to be matched, nor do the current sources need to be tightly specified or matched. Anything between, say, 1-10mA will suffice.

You could connect multiple FETs in series, but there would need to be some arrangement to ensure equal voltage sharing, which wouldn't be worth it.

For just a resistor, the value would be 90/0.0053 = 17K, since the voltage across it is one rail plus the voltage across R2, which is 60/2 (minus a couple of volts of Vgs of the MOSFETs).

*With CCS to ground, the LTP stays off until C5 is charged to a couple of volts, then it turns on suddenly, bringing the output up to a couple of volts at the same time. With the CCS to the opposite rail, the LTP turns on before C5 has charged significantly, resulting in a smooth ramp up of output voltage from 0 to fully on. It's not a big deal really, so no great loss if it's more practical to connect the CCS to ground.



AndrewT said:
...How could you incorporate a current limit into the PSU?
Even better if this was foldback?..
I suppose the simplest method would be to place a small resistor in series with the source of the pass MOSFET, then sense the voltage across it with a transistor that shorts the top of R8 to the input. I've attached a schematic of how that would look. It would give just normal current limiting. I'm not familiar with how to implement foldback limiting, so I can't help you there.


AndrewT said:
...Could you explain, in detail, the function of C7, it appears to be passing output ripple straight back to LTP. I've seen this in other circuits. What specs determine it's effectiveness?
It does indeed feed ripple back into the LTP, into the inverting input, i.e. negative feedback. This reduces the AC gain, thus reducing the ripple. It needs to be large enough to start rolling off the gain well below the ripple frequency (100 or 120Hz). With the given component values it is ~7Hz. Larger values will improve ripple slightly, but more than 100n gives severely diminishing returns. Type of capacitor is not critical.



AndrewT said:
...What is the RC time constant for c5? R1//R2 *C5 or other?..
R1||R2 *C5 is 235ms, or a corner frequency of 4.3Hz. It is the voltage here that controls the output voltage, so obviously the higher the time constant the better the output ripple, but too high can cause it to take too long to turn on. These component values are the main contributors to overall performance.



AndrewT said:
...Have you simulated reduced values for C1&2?..
I have done sims with other values of reservoir capacitor. The ripple at the output is directly proportional to the ripple here. Smaller values give more ripple. More ripple means the dropout voltage must be set higher, which reduces efficiency. Choose whatever value gives the performance you want at the required output current.


AndrewT said:
...Why do I want current limit;- to avoid catastrophic failure downstream and also to slow charge downstream capacitance. I'm still thinking ClassA.
Ahhh. You don't need to worry about slow charging because capacitance multiplers give an inherently slow turn-on due to time constant R1||R2 *C5. You can easily have it take several seconds to approach full output voltage by increasing C5.
 

Attachments

  • currentlimit.png
    currentlimit.png
    1.2 KB · Views: 3,561
A thread back-from-the-dead !

How does this capacitor multiplier improve over the traditional one using a darlington, e.g. using 47R and 10,000uF & a TIP121, you get an effective capacitance of 10F but with a drop-out of up to 4V - its also very cheap to do.

Your version may be LDO, but what ripple rejection do you get?

Thanks
 
A thread back-from-the-dead !

How does this capacitor multiplier improve over the traditional one using a darlington, e.g. using 47R and 10,000uF & a TIP121, you get an effective capacitance of 10F but with a drop-out of up to 4V - its also very cheap to do.

Your version may be LDO, but what ripple rejection do you get?

Thanks
I don't remember the actual ripple rejection for this circuit, but it does have better ripple rejection than the normal darlington version, due to the FET's high input impedance. Alternatively, the ripple rejection can be traded for smaller C instead (which is what I did).

The Darlington version is certainly cheaper, but on the other hand the LDO version can get away with lower power pass devices, and a lower voltage transformer or smaller reservoir capacitors.

PS. I'm still using this very PSU, and have heard from a couple of people who have successfully built their own versions.
 
After much delay, my version of the Improved Capacitance Multiplier. I am basically at the prototype stage, and hope to have a working version in a couple days.

Layout is complete, pics below are 3D-renderings, and circuit boards are almost in my hands.

My goal is to adapt this design for use with my through-hole version of Shaan's simplified VSSA (aka PeeCeeBee),

http://www.diyaudio.com/forums/solid-state/231662-peeceebee.html

as well as the original set of VSSA modules I have received from LazyCat's Group Buy offer.

The circuit is essentially the same one presented by MrEvil, only exception is that the jfets have been connected to ground, and not to the opposite rail, to make use of more commonly available parts.

My goals are to achieve controlled turn-on, low-ish dropout voltage, and moderate cost, with much lower noise and ripple than what can be expected from a pure rectifier/filter.

Oh, and last but not least,
@ Miles, a big Thank You (nanos gigantum humeris insidentes)
 

Attachments

  • VSSA_PSU4_layout.jpg
    VSSA_PSU4_layout.jpg
    261.9 KB · Views: 3,068
  • VSSA_PSU4_1.jpg
    VSSA_PSU4_1.jpg
    128.3 KB · Views: 2,969
  • VSSA_PSU4_2.jpg
    VSSA_PSU4_2.jpg
    115 KB · Views: 2,870
To continue discussion : in single layer way and to take care on short tracks from diode Gnd near DC+ and DC- could be share from AC2 and AC3 so that gnd tracks could be stopped and this point and than you have free space for diode to caps on same layer. Do you see an issue? Each Diode could be turn 90° so that you could shorten tracks from diode to diode...

Marc
 
After much delay, my version of the Improved Capacitance Multiplier. I am basically at the prototype stage, and hope to have a working version in a couple days.

Layout is complete, pics below are 3D-renderings, and circuit boards are almost in my hands.

My goal is to adapt this design for use with my through-hole version of Shaan's simplified VSSA (aka PeeCeeBee),

http://www.diyaudio.com/forums/solid-state/231662-peeceebee.html

as well as the original set of VSSA modules I have received from LazyCat's Group Buy offer.

The circuit is essentially the same one presented by MrEvil, only exception is that the jfets have been connected to ground, and not to the opposite rail, to make use of more commonly available parts.

My goals are to achieve controlled turn-on, low-ish dropout voltage, and moderate cost, with much lower noise and ripple than what can be expected from a pure rectifier/filter.

Oh, and last but not least,
@ Miles, a big Thank You (nanos gigantum humeris insidentes)

Big thanks to both circuit designer and to pcb designer for this useful PSU! I am really surprised that this low dropout capacitance multiplier is not more used by diy-ers. It is versatile PSU, I intend to use it for all my diy amps up to 40V rails, not just for those that have lower PSRR.

I am not competent enough to comment pcb but if Marc has some idea how to make it single layer (for those builders who want to etch their own pcbs), why not?
 
Last edited:
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.