TPS7A4701 and TPS7A33 PCBs?

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I'm looking for TPS7A4701 and TPS7A33 3-4 pin PCBs that can reach 30v but all of the ones that I've seen can only go up to about 20v even though the ICs top out at 34v.
I made a baseline layout for a PCB
gfDZOMl.png

but I have never soldered something like this before, I'm a bit iffy on it because I don't want to waste money on failure.
Does anyone know if higher voltage versions of these exist?
If not, does my PCB layout look good?
 
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When you design a PCB for higher voltage you have to first check that passives of necessary values (mostly ceramic capacitors) are available in sizes that you used on your PCB. Next you'll have to observe the clearance between the traces and pads on the PCB which, assuming "normal" contamination levels, should withstand elevated working voltage. Also follow the suggestion from Russel above and make beefier GND connection at the input/output connector. If you intend to make positive and negative three pin regulator breakout adapters have a look at the exact pinout of regulator ICs which is different for positive and negative parts.

One more important thing to realize is that once you start sharing the input GND connection with output GND the use of expensive low noise regulators becomes significantly less effective.

Regards,
Oleg
 
I would rotate the whole layout counter clockwise 90 degrees and move the input and output caps so their ground sides are close to each other and the device ground much like the recommended layout on the data sheet. You want to make the high current paths as short and direct as possible. Secondly, if you are using any ceramic caps to bypass the input be advised that they should be rated well above the maximum input voltage. High capacitance ceramics significantly drop actual capacitance value if operated close to their rated voltage. As the data sheet recommends use one that is rated at least twice the maximum operating voltage.
 
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Well I see what you mean by fighting the caps. But I would still do it. What is working against you is the max voltage required for the caps. That makes them huge. I think you already know that. And if you are expecting to run a relatively high difference between input and output voltage at currents of more than, say, half an amp, power dissipation is going to be a significant problem.
I believe Oleg was referring to the tiny trace that went from what I believe is the ground plane (light blue) and the GND pin.
If I was doing the layout the top side traces (red) would go to Vin pin on the left and pick up the 10uF cap ground would come straight up the middle to the IC and pick up both input and output caps and output trace to the IC and pick up the 47uF cap. I would pour ground plane on top and bottom with multiple vias to stitch it together primarily to remove heat. Your layout is relying on one ground via to connect the input cap and the vias under the IC to connect the output cap.
 
Figure 28 is the way I would generally do it bringing traces directly down to the three pins that go off board. Take the other layout and rotate the whole thing clockwise. Relocate the input cap so it almost butts up the the output cap ground connection. Now you have two layouts that are similar. If you want to preserve the remote sensing capability use a four pin interface and the sense line will get connected to Vout at the point of load. The sense trace does not have to be very wide since it is not carrying significant current.
 
And if you are expecting to run a relatively high difference between input and output voltage at currents of more than, say, half an amp, power dissipation is going to be a significant problem.
I'm going to run about 600ma through it @ a couple of volts but I'm going to heatsink the back of it.

Why not big capacitors for in and out externally?
I was told by someone not to cheat with external capacitors if I care about performance.

Figure 28 is the way I would generally do it bringing traces directly down to the three pins that go off board. Take the other layout and rotate the whole thing clockwise. Relocate the input cap so it almost butts up the the output cap ground connection.
As I said earlier because of the size of the capacitors the layout you suggest is awkward and creates a longer current path.

For all the trouble I'm wondering if it would be better performance to just create a miniature 3 pin super regulator. There's a lot of weird requirements with this reg.
 
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The common GND issue. It matters because the regulator IC takes its reference from the GND next to the IC and regulate the output voltage against this reference. Now you have a single pin connecting the input and output GNDs to your circuit which reg suppose to supply. Depending on the return currents traveling this pin you incur a voltage drop on its impedance. Since return currents related to the input and the output are different they do not cancel each other and the difference between these two return currents is the noise which will not be taken care of by the reg.

To avoid this issue use an analogy of the layout as shown on the second picture in post #8 where input and output GNDs are separate and meet exactly under the IC.

Hope it helps.

Regards,
Oleg
 
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Everyone keeps saying that but the big cap prevents the leads from being short between GND and the output.
KwBnPXN.png

I can stack the 10uf caps on top of each other vertically to solve the issue but that seems like an unelegent solution as there is no easy way to do that.
The big cap represents a relatively large trace distance between the output or ground.
 
I'm going to run about 600ma through it @ a couple of volts but I'm going to heatsink the back of it.


I was told by someone not to cheat with external capacitors if I care about performance.


As I said earlier because of the size of the capacitors the layout you suggest is awkward and creates a longer current path.

For all the trouble I'm wondering if it would be better performance to just create a miniature 3 pin super regulator. There's a lot of weird requirements with this reg.

This is an easy to use regulator. The "weird requirements" are not really any different than you would find with any other regulator if you want it to perform well.
 
The TPS7A33 recommends a feedforward capacitor be connected between the output and the Fb pin
http://www.ti.com/lit/ds/symlink/tps7a33.pdf
but the TPS7A47 does not mention one.
Should I connect this feedforward capacitor to the negative regulator only?

They are not the same regulator, the design of 7a33 is different. The 7a47 datasheet would have mentioned it if it were applicable.
 
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