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Old 27th October 2015, 06:35 AM   #1
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Default dc/dc isolated transformer

Hi ,

sorry I know its a bit offtopic but I have a question about isolation transformers (DC/DC 2w)

We have a FPGA board that needs a clock..of course we are feeding the clock using a low noise LDO

However one of our engineers is proposing to add a DC/DC isolation transformer before the clock to reduce further the noise.

Is that a valid approach ?
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Old 27th October 2015, 06:50 AM   #2
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Your term 'DC/DC isolation transformer' is a little confusing. Does it just mean 'a pulse transformer' ? In which case yes its a good idea, it helps to avoid groundplane noise being coupled into the clock signal. Essentially, with a transformer the clock can be sent from the oscillator in balanced form - the transformer at the FPGA converts it back to single ended.

However should your term actually mean 'isolated DC/DC converter', its not a good idea as most such modules are noisy. They're the last thing you'll want on your board if noise reduction is the aim.
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Old 27th October 2015, 07:18 AM   #3
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since transformers don't work at DC the term DC/DC 2W refers to power conversion SMPS then the added "transformer" term refers to galvanic isolation.
can it help? sure, it can also make things worse. DC Isolation implies corrupt grounding so differential outputs with a carefully selected low noise SMPS can work with proper PCB layouts etc.
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Last edited by infinia; 27th October 2015 at 07:24 AM.
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Old 27th October 2015, 07:25 AM   #4
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Hi ,

its called a DC/DC isolated converter

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Old 27th October 2015, 07:29 AM   #5
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not sure what the target ripple and noise spec is, why not call that vendors app engineer ?they can suggest the best solution for your needs> they do have some very low noise stuff. bread boarding is suggested with the clock circuitry then look at the clock spectrum.
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Last edited by infinia; 27th October 2015 at 07:32 AM.
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Old 27th October 2015, 07:36 AM   #6
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Powering a clock from a local SMPS doesn't look to me to be a good idea. The spec says 14mV output ripple but doesn't give a frequency.
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Old 27th October 2015, 07:40 AM   #7
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Quote:
Powering a clock from a local SMPS doesn't look to me to be a good idea. The spec says 14mV output ripple but doesn't give a frequency.
there are good ones, ive designed one to bias a VCO varactor diode before, in a STB TV tuner!
is that one good, IDK I didn't study it. he needs to leave it up to the responsible engineer, its not just the converter. LDO, isolated grounds, and diff outputs all working together
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Last edited by infinia; 27th October 2015 at 07:46 AM.
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Old 27th October 2015, 07:44 AM   #8
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Yes - if low noise is the aim then 'better the devil you know' says to me design it yourself so you'll have some idea what its emissions are going to be. A varactor bias supply will be an extremely low power one, far lower than this one (1W) being suggested here. Lower power means less noise, in general.
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Old 27th October 2015, 07:49 AM   #9
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indeed that's why I suggested he call an app engineer that knows their full product line.
the approach can be worked, but not at the single component level.
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Last edited by infinia; 27th October 2015 at 07:53 AM.
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Old 27th October 2015, 07:53 AM   #10
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If the engineer's original aim is to have an isolated ground so he can couple the clock in to the FPGA without worrying about groundplane noise, I think the medicine's probably worse than the disease. Better to use an isolation transformer (bal-SE at the FPGA) for just the clock signal I think.
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