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Old 26th November 2014, 09:36 PM   #1
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Question Simple power supply PCB layout question

Hi,

I am new to the PCB design so I decided to start from what I thought is a simple task: dual polarity power supply PCB for a chipamp. But now I have a question. Is it OK to place the ground and power traces/planes on top of each other on two different PCB layers. For example V+ trace is parallel to V- trace on same layer but GND is on the other layer below both power traces. Or I should route all three in parallel on the same layer with GND being between V+ and V- ? Could someone suggest which way is better and why?

Thanks,
OlegSh
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Old 27th November 2014, 01:09 PM   #2
AndrewT is offline AndrewT  Scotland
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The Zero Volt trace above/below the +ve trace achieves low loop area.
Similarly for -ve trace.

If the PCB is very thin then you get even lower loop area.
This is where multi-layer PCBs win. The layer can be <10thou/mil apart for lowest loop area and lowest impedance AND they gain a little bit of capacitance due to trace area and small gap.

All three side by side is not as good. Better would be a twisted triplet of +ve -ve zero volts, for good Flow and Return loop area AND cancellation of (more distant) fields due to the twisting.

Worst of all are the +ve trace separated from the zero volts trace and then both separated from the -ve trace.
This is the way you see most PSU and amplifier PCBs laid out. A disaster !
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Old 27th November 2014, 07:07 PM   #3
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Thanks a lot AndrewT!
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Old 27th November 2014, 07:39 PM   #4
SGK is offline SGK
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What about a ground plane top and bottom?
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Old 28th November 2014, 09:17 AM   #5
AndrewT is offline AndrewT  Scotland
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Yes multi-layer boards do this.
6 or 8 layers (and many more) and approximately half of them are non signal planes.
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Old 28th November 2014, 09:50 AM   #6
SGK is offline SGK
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My point was more to the OP's situation. Rather than running 0 volt traces does it not make sense to run a ground plane on top and bottom of the board?
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Old 28th November 2014, 10:34 AM   #7
AndrewT is offline AndrewT  Scotland
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A wide trace under the +ve trace is effectively a plane.
It allows the Return current route to exactly mimic the Flow route.

You can do this manually by overlaying the traces, or you can adopt a local plane, or you can adopt a global plane.
BUT in all three cases, the RETURN ROUTE must exactly mimic the FLOW ROUTE.
This minimises impedance of the whole Flow AND Return route.

One of the biggest errors in laying out a ground plane made by anyone that does not understand ground planes, is forcing the Return Route to NOT follow the Flow Route.
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Old 28th November 2014, 10:39 AM   #8
AndrewT is offline AndrewT  Scotland
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Even though I am responding to questions on using or abusing ground planes, I know that I do NOT have sufficient knowledge to design a multi-layer planed PCB.
I know my limitations.
I am proud that I know NOT to hide MY LIMITATIONS.

I had work colleagues that were the opposite. I would not stake my safety, nor my life, on professionals that tried to operate outside their area of expertise. In my work related experience, Chartered Architects are among the worst for this alleged failing.
Now I must have offended many hundreds of Members.
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Old 28th November 2014, 10:50 AM   #9
SGK is offline SGK
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Quote:
Originally Posted by AndrewT View Post

You can do this manually by overlaying the traces, or you can adopt a local plane, or you can adopt a global plane.
BUT in all three cases, the RETURN ROUTE must exactly mimic the FLOW ROUTE.
This minimises impedance of the whole Flow AND Return route.

.
I guess I am struggling to understand how the critical condition you specify is met when the 0 volt is a copper fill 'ground plane' i.e. the entire board layer area (let's consider just 2 layers for ease) unused by the +ve (or -ve) "flow route" on both the top and bottom layer.

(To aid conveying what I mean by copper pour ground plane see here from the 5 minute mark.)
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Old 28th November 2014, 11:34 AM   #10
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Andrew, when I have gone to the university to study "Information Theory" 40 years ago and have been taught, how to layout PCBs (using wire-wrap technology): one of the major rules has been to avoid "stray capacities".

I am currently using a PSU-layout, shown in the picture below.
And I think: it is not bad at all.

Best regards - Rudi
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Last edited by Rudi_Ratlos; 28th November 2014 at 11:36 AM.
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