It's actually easier to do than a two sided board, for the most part. If you have enough inner layers for the supplies and ground,
all those traces are gone, replaced by vias to a layer. You can then concentrate on good layout practices, instead of trying to cram
everything into just two layers.
PCB design is not that taxing, a bit of placement and join the dots
Sounds like you haven't done much of it. It's extremely detail oriented.
Yes it is, placement is certainly an important part of pcb layout. I spend about half of my time on the initial placement, then routing is much easier.
Probably done a lot more than you or most on this site actually, and probably more cutting edge designs as well.
So before you jump in you may want to note I put a smillie at the end of my comment and my profile lists what I have done as a job since 1985.....
For the record placement is the most important skill in PCB design, if you don't get the placement correct routing will be horrendous.
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Ok, then you must be a lot better at it than I am. It takes me around 3-4 weeks to complete a medium size pcb, and I've been doing this for decades.
I have been doing it for 30 years next year and have done nothing else for the last 30 years but design and study all aspects of PCB design manufacture and assembly, including being well versed in the IPC specs. I did most of the PCBs for this and have worked closely on the noise cancelling headphones that hook up to it (not Bose):
http://www.northropgrumman.com/Capabilities/ANVIC5/Documents/vic5.pdf
and mainly do work for similar customers...I also do a lot of HDI designs as well as SMPSs for sensitive areas.
I did put the comment up as a light hearted look at PCB design because it still is join the dots when alls said and done, you just have to think of impedances, length matching current capacity EMC signal integrity (I use SIV software) etc etc.
http://www.northropgrumman.com/Capabilities/ANVIC5/Documents/vic5.pdf
and mainly do work for similar customers...I also do a lot of HDI designs as well as SMPSs for sensitive areas.
I did put the comment up as a light hearted look at PCB design because it still is join the dots when alls said and done, you just have to think of impedances, length matching current capacity EMC signal integrity (I use SIV software) etc etc.
I have been doing it for 30 years next year and have done nothing else for the last 30 years but design and study all aspects of PCB design manufacture and assembly, including being well versed in the IPC specs. I did most of the PCBs for this and have worked closely on the noise cancelling headphones that hook up to it (not Bose):
http://www.northropgrumman.com/Capabilities/ANVIC5/Documents/vic5.pdf
and mainly do work for similar customers...I also do a lot of HDI designs as well as SMPSs for sensitive areas.
I did put the comment up as a light hearted look at PCB design because it still is join the dots when alls said and done, you just have to think of impedances, length matching current capacity EMC signal integrity (I use SIV software) etc etc.
Wow, no wonder you think it's easy. Remember how bewildering it is to a novice, though. Most just have a basic layout program and no experience.
Yes, I do give sensible advice regarding PCB design on here and a more electronic based forum. The best way of learning it is doing it, and when starting out (or even when experienced) try different placements of components and see how the routing changes, especially on analogue, which can be more taxing than digital as it is often less forgiving especially feed back loops that like to be small. I am doing a big analogue board next, looking forward to it, plenty of op-amps and sensor inputs, old school components as well (well SOIC IC's 1.27mm pitch a change from the 0.5mm and 0.65mm QFNs that I generally play with).
AGND and DGND as well but with the recommendation that there are lots of stitching points as these little single point starpoints don't do that well when EMC testing is done, the conducted immunity tests on the cables can cause one ground to rise way above the other causing all sorts of problems due to a high impedance tiny starpoint, often a via on some designs.
AGND and DGND as well but with the recommendation that there are lots of stitching points as these little single point starpoints don't do that well when EMC testing is done, the conducted immunity tests on the cables can cause one ground to rise way above the other causing all sorts of problems due to a high impedance tiny starpoint, often a via on some designs.
Ok, do you follow the one ground plane for everything school, or partition the ground plane?
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It depends heavily on the designs, its complexity etc, generally with good placement or where more than one convertor is on a board I tend to favour one ground, sometimes with some sort of isolation for the analogue power (Pi filter). I see designs with one two and more grounds depending on the designer, the complexity and the application...all work in the long run.
What I will say is I hate these spider legs style grounds where every node has a route back to a starpoint, just adds inductance between nodes and becomes a wideband antenna to pick up EMC, a starpoint has always been a joining point between two low impedance grounds as have star grounds.
What I will say is I hate these spider legs style grounds where every node has a route back to a starpoint, just adds inductance between nodes and becomes a wideband antenna to pick up EMC, a starpoint has always been a joining point between two low impedance grounds as have star grounds.
there's the first question How many? One needs too understand mult-layer PCBs and their requirements to make a good estimate of how many layers might be required.
I don't count that as a multi-layered PCB. For one the gap is about 5 times too thick.
This is something I wrote regarding layer count for someone first using an FPGA device in a ball grid array package. Not totally relevant as its a bit advanced but it gives you an idea of the thought process. I will look around my stuff for similar notes on analog (though Ti, Analog, Linear app notes and various publications are a good source of relevant info).
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Well when you only have a 2 sided board to deal with and more than 1 ground you have to do a starpoint.
Often with 2 layer pcbs, I can place traces on both layers, and still have a reasonable ground plane on the top,
even on a dense pcb. Voltage distribution can be on the bottom layer, down the middle of rows of dips, or near the edges.
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I am aware of how to do two layer boards. Please read my reply I did not say anything against using a star point to connect two grounds.
I am aware and understand signal flow on PCBs and how the ground return currents work and how to do grounding properly, I do this for a lot of complex and critical designs and have done for many years. My designs are also subject to severe testing and often have to meet EMC requirements well above commercial equipment. I have been lucky over the years because of the type of projects I work on to work closely with and attend seminars and training on all aspects of laying out various circuits, especially SMPS's, very sensitive analogue, EMC etc.
So if you are going to quote me at least read what I have said, the first paragraph sais that I see designs with single and multiple return (arbitrary 0V) grounds. What I don't agree with is the excessive use of separate thin tracks for each GND node, lucking like some squashed spider on the PCB, optimising component placement and paying as much attention to the signal return path as the signal would pay dividends here. This means trying different placements to get the optimum routing for a design.
Its all about current loops and knowing where they are and on what effect your layout will have on the signal integrity of the design. For the high speed stuff I use a Signal Integrity Verify program, for supply impedances etc I use a similar package that simulates power/ground planes and power routing. So I see regurarly many types of designs with much more arduous requirements for return currents (GND planes) and see many different views from engineers on how this should be achieved and we work together and create a layout that fulfils all those requirements and as I said designs with one to many GNDs all work, each design requires its own analysis and solutions.
AndrewT keeps giving some good advise, draw the currents over a picture of your layout, I'd go further and say use different coloured pens for different requirements. Learn and understand how signals propagate (electrons move at approx. 0.1mm sec and slower) and do lots of designs, make mistakes and learn from them...Also devour all the information that is out there regarding this. And if I had to recommend just one book it would be:
Electromagnetic Compatibility Engineering: Amazon.co.uk: Henry W. Ott: Books
Oh and to be a bit pedantic, you never have more than one ground (how I hate that term) every design has only one "0V return"....
More later
What does it mean "to do a startpoint"?
I have a question about trace length also. Is it critical? For example there are 4 traces between receiver IC and DAC IC and one of them a bit longer (blue trace). Trace length can be reduced from 10mm to 5mm by switching to ground plane and back to signal plane (marked red). Or it be better increase length of another 3 traces, or do nothing? =)
I have a question about trace length also. Is it critical? For example there are 4 traces between receiver IC and DAC IC and one of them a bit longer (blue trace). Trace length can be reduced from 10mm to 5mm by switching to ground plane and back to signal plane (marked red). Or it be better increase length of another 3 traces, or do nothing? =)
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