Resevoir capacitors for Chip Amps

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I've started to digest it, I agree its mainly excellent value.

One or two points don't seem to have been raised (I'm only on post 28 so far) -one is that lytics have inductance. So some of those HF figures for (say) 1,000uF Panasonics should be adjusted for the series inductance.

In my experience (that is measurement with an LCR meter, 4 wire) lytics above 2,200uF or so have a self resonance below 20kHz. I used to think this was a major problem but on reflection its not so bad, due to the ESR. A typical lytic's ESR is around 10X the impedance [sqrt(L/C)] of that resonance, meaning its well damped and although the impedance turns inductive above the SRF, its not strongly inductive due to the ESR. This means the cap's still doing useful work decoupling, probably even at 5X the SRF. However do bear in mind that adding just a few mm of PCB trace will double the inherent inductance of your typical lytic.
 
I used to think this was a major problem but on reflection its not so bad, due to the ESR. A typical lytic's ESR is around 10X the impedance [sqrt(L/C)] of that resonance, meaning its well damped and although the impedance turns inductive above the SRF, its not strongly inductive due to the ESR. This means the cap's still doing useful work decoupling, probably even at 5X the SRF. However do bear in mind that adding just a few mm of PCB trace will double the inherent inductance of your typical lytic.
Yes, exactly. Lytic's are benign as far as resonance is concerned, should never be a problem, no matter in what way they are combined with different values of that type.

That trace, last bit of, inductance is the big headache, of course - this is where 'sculpting' gets into the action, and/or tiny lytics, ceramics ...
 
For high-frequency decoupling at least, the self-resonant frequency is where you want to be. A capacitor works best for decoupling at its self-resonant frequency, where its impedance is lowest (just the ESR).

We could use multiple values to get a nice spread of self-resonant frequencies. But that always tends to create impedance peaks between the self-resonant nulls. And those impedance peaks are what causes unwanted resonances.
 
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Further, those impedance peaks can eliminated by using the right strategies. It all comes down to how critical it is to achieve a sufficiently low impedance at various frequencies - in the world of large scale, very high speed digital these techniques have been greatly refined, significantly more than needed for audio circuits ...
 
I found that the recipe for a guaranteed resonant peak is when a capacitive slope and an inductive slope have continued for about a decade or more in frequency until they meet at the intersect. Something like a big 'lytic and a smaller film.

OTOH, even with low-ESR film/foil or ceramic types once you have the self-resonant frequencies spaced closer than an octave the impedance curve ripple becomes tolerant in magnitude while still very visible as some sort of fine grain. That already means lots of different caps and lots of paralleling and strategic placement and layout. Getting a few mOhms truly flat and purely resistive out to 1MHz+ sure is possible but a tremendous trial-and-error task even with tools like a network analyser.

A standard chipamp probably won't need that level of a "perfect" low-Z supply anyways, how/where you bypass is much more important than what you use exactly as long as it a reasonable choice. The common concept of symetric MF/HF-bypassing the supply pins through GND is not the best given the modest PSRR of most chips, especially neg supply. Asymmetric rail to rail and neg rail to GND bypasses help the chip in that they make the MF/HF common voltage (of the input pins) proportional to output current instead of its half-wave rectified components that appear with the standard dual rail to GND bypasses.
 
Klaus,

I threw together two simulations, one with decoupling from each rail to ground and one as you mentioned with decoupling from pos rail to neg rail and from neg rail to gnd. I used a +/-40V square wave output signal, into 8 Ohms, with 10 us rise and fall times and 23 Hz rep rate, provided by a Class AB BJT-based output stage model from Bob Cordell (via FAS42, way back when).

Attached are time-domain plots of rail and signal voltage (square wave at 23 Hz repetition rate). Mains frequency was 60 Hz (giving 9 different ripple patterns, depending on relative phases of signal and rectified mains).

It appears that decoupling pos rail to neg rail has significantly reduced the "stairstep" effect of the charging pulses, in the rail voltages.

Also attached are FFT plots of (the same) 3.6 seconds of data for each of the negative rail voltages. (It probably wasn't really enough data for an FFT, and I didn't time-align it to be periodic overall, but it gives an indication.)

From the FFTs, it looks like the 120 Hz component and its harmonics have been reduced in magnitude, by a significant amount.

The power supply had one 4700 uF cap per rail and the decoupling caps were only one 4700 uF per rail (with ESR of 42.55 mOhm each).

Sorry about the messy schematic. It was last used for something completely different. For the alternative decoupling method, the bottom of Cpos2 was connected to the bottom of Cpos3, instead of GND.

EDIT: Added fifth plot, with direct comparison of the V+ rail ripple, for the two decoupling methods.

Cheers,

Tom
 

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In one sense this is nothing new, but I've been doing some simulating with real, not macromodel, opamp circuits - transistor level in other words - investigating how they behave when presented with realistic power supplies; this is part of an exercise to understand the interplay of all the factors in real world circuits ...

And what's striking is what happens when there is transient clipping event - this occurs not in the normal sense of the input waveform climbing towards a fixed voltage ceiling as far as the output stage is concerned, but rather that the voltage across that output stage has sagged, plus being hit in turn by a transient spike which momentarily, a split second event, causes the circuit to lose sufficient, adequate operating voltages.

Tom of course has been investigating this for quite some time, and others would be aware that such is possible, so this is not news. But what is remarkable is the amount and type of damage done to the output waveform, quite a nasty glitch - and, a particularly nasty spike in the supply current drawn at this point, with very high frequency components.

The precise nature of this aberrant behaviour will obviously depend on the circuit topology in every area - but it gives a strong hint as to why amplifiers can turn quite subjectively nasty when working hard, much more than the simple conceptual model of clipping would imply ...
 
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