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Old 12th September 2013, 12:50 AM   #31
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Thanks again Gootee - I've found this to be highly informative, and has debunked a few assumptions in my mind about what is really going on in a psu. Thanks for the LTspice model in particular - that's been the sort of info that just 'makes sense' in understanding it
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Old 12th September 2013, 01:21 AM   #32
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I've been playing around with a few LTSpice sims after Frank posted up that '10mohms all the way is great' and found that target very difficult to hit across the whole band. But its been a very interesting exercise nevertheless and revealed some of the limitations of using LTSpice in the pursuit of such demanding endeavours

First up - at the low end (say down to 40Hz) aiming for 10mohms of reactive impedance means around 400,000uF. ESRs tend to decrease quite a bit as the frequencies go down so it might be that even more is called for to get the modulus of impedance down to 10mohm.

At the top end (say 50kHz and up), there's no real substitute for SMT ceramics, fistfuls of them, paralleled up ad nauseum. My 10W chipamp has about 30 but I'm not sure this is enough. They're cheap though (10uF/25V goes for under UKP0.01 here) but they do lose a lot of capacitance under bias (10uF is down to 4uF @16V, this is brand dependent though - the poorer brands do considerably worse). For those building higher power amps (higher voltage rails than say 25V) SMT ceramics don't look such an interesting prospect though as it gets much harder to get enough uF.

In moving down from 50kHz comes the greatest challenge - how to bridge between the ultra-low impedance (30 * 10uF goes way below 1mohm ESR) of the ceramics and the brute force capacitance required at the bottom end? As Frank hints, 3D sculpting looks to be the way to go but I'm right at the earliest stages of doing this (caps on individual twisted pairs arranged in a sphere) so I'll shut up now

<edit> In Jobs style, just one more thing - the problems are ameliorated considerably if we just build lots of chipamps to parallel - 10 say can operate with 100mohm target supply impedance. Anyone tried this?
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Last edited by abraxalito; 12th September 2013 at 01:37 AM.
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Old 12th September 2013, 01:37 AM   #33
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You are quite welcome, aspringv.

Yeah, LT-Spice is really a great aid to understanding, as long as you always try to be sure that the results are "reasonable", and also are not "too good to be true" because of some built-in ideal-ness or unrealistically-perfect symmetry, or whatever. (But it does make me wish that my computer was at least 100X faster.)

I love being able to click anywhere and plot any voltage or current, and even power dissipation of absolutely any component OR subsystem (Alt-Left-Click). And I love being able to integrate any portion of any plot so easily (and get the average and RMS values), or see its FFT.

The .step operator is also extremely powerful and helpful, providing the ability to do multiple nested sweeps of parameters, automatically running a whole simulation for each case, and putting all of the plots in one plot pane when it's all done.

It's pretty easy to make your own components and sub-circuits, too. I have a couple of simulation schematics that look more like a block diagram or flow chart. I have entire circuits in each box, with their inputs and outputs defined, and I can just connect the boxes together and run it. Right-clicking on a box gives access to the schematic. And you can have as many sub-levels as you want.

I could go on and on. And the fact that it's free and still constantly being developed is almost too good to be true. The discussion group at yahoogroups is also truly excellent.

Last edited by gootee; 12th September 2013 at 02:04 AM.
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Old 12th September 2013, 01:53 AM   #34
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Having fun, Richard ...?

Quote:
Originally Posted by abraxalito View Post
First up - at the low end (say down to 40Hz) aiming for 10mohms of reactive impedance means around 400,000uF. ESRs tend to decrease quite a bit as the frequencies go down so it might be that even more is called for to get the modulus of impedance down to 10mohm.
I 'cheat' here ... use regulators to get the job done - to me, this is the smarter way to go ...

Quote:
In moving down from 50kHz comes the greatest challenge - how to bridge between the ultra-low impedance (30 * 10uF goes way below 1mohm ESR) of the ceramics and the brute force capacitance required at the bottom end? As Frank hints, 3D sculpting looks to be the way to go but I'm right at the earliest stages of doing this (caps on individual twisted pairs arranged in a sphere) so I'll shut up now
As always, the Law of Diminishing Returns will get you - there has to be a 'sweet spot' of just enough low ESR at the right frequencies for the amplifier in a particular situation to work at, say, 98% of its best. And if that's good enough for the sound out to be 'right', then how much effort does one want to expend, to eke out just that little bit more?

I don't know what the precise answers are, so it's definitely worthwhile for you, Richard, to persevere and get more answers - to add to the pool of greater knowledge, for all to benefit ...

Cheers,
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Last edited by fas42; 12th September 2013 at 01:56 AM.
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Old 12th September 2013, 01:57 AM   #35
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Quote:
Originally Posted by abraxalito View Post
I've been playing around with a few LTSpice sims after Frank posted up that '10mohms all the way is great' and found that target very difficult to hit across the whole band. But its been a very interesting exercise nevertheless and revealed some of the limitations of using LTSpice in the pursuit of such demanding endeavours

First up - at the low end (say down to 40Hz) aiming for 10mohms of reactive impedance means around 400,000uF. ESRs tend to decrease quite a bit as the frequencies go down so it might be that even more is called for to get the modulus of impedance down to 10mohm.

At the top end (say 50kHz and up), there's no real substitute for SMT ceramics, fistfuls of them, paralleled up ad nauseum. My 10W chipamp has about 30 but I'm not sure this is enough. They're cheap though (10uF/25V goes for under UKP0.01 here) but they do lose a lot of capacitance under bias (10uF is down to 4uF @16V, this is brand dependent though - the poorer brands do considerably worse). For those building higher power amps (higher voltage rails than say 25V) SMT ceramics don't look such an interesting prospect though as it gets much harder to get enough uF.

In moving down from 50kHz comes the greatest challenge - how to bridge between the ultra-low impedance (30 * 10uF goes way below 1mohm ESR) of the ceramics and the brute force capacitance required at the bottom end? As Frank hints, 3D sculpting looks to be the way to go but I'm right at the earliest stages of doing this (caps on individual twisted pairs arranged in a sphere) so I'll shut up now

<edit> In Jobs style, just one more thing - the problems are ameliorated considerably if we just build lots of chipamps to parallel - 10 say can operate with 100mohm target supply impedance. Anyone tried this?
I suggest that you go to the Cornell Dubilier website and use their Java applet. It automatically produces FREQUENCY-DEPENDENT spice models for their electrolytic caps (and the models are temperature-dependent, as well).

Also look at the plots the applet gives, for ESR and capacitance versus frequency and temperature, with variable inductance.

Yeah, the 3-D "arrays" of paralleled caps interested me, too. I haven't played with it much, yet. Large unbroken copper planes work well, too, in certain regimes (see posts by Terry Given). The problem always comes down to the inductance of the connections, it seems. And at the end, you still have to be able to connect them at the point of load, without connections that wreck the fruits of your labor. (Maybe consider 2-sided PCBs in 3-D shapes, full of caps?)

Yes, that reminds me, I did a lot of simulations of paralleled chip amps. Back then, the only halfway-decent spice model, for a chip amp, was the OPA541E. At least it also modeled the supply pin behavior, and seemed pretty good, otherwise, too (modeling-wise). I usually had the paralleled chip amps in the forward path of an op amp's feedback loop, inside the loop, just after the opamp output, more or less. That topology seemed capable of providing some "baked-in goodness" that I couldn't easily get otherwise. It also turned out to be the answer for driving highly-capacitive loads: excess current-dumping capability (with the right feedback compensation, etc, for the op amp, of course). Just make sure you have a low-pass filter on the overall input, limiting the slew rate to 7 V/us, or whatever the max is for the chip amps you use. It was lovely to see how smart the outer feedback loop could seem. For example, for a square wave signal, the input to the chip amps would contain a spike, to jumpstart the rise time, and then another one the opposite way to make it instantly stop rising, to turn a perfect corner and become the flat top of the square wave (and similarly for the falling edge). It had WAY better transient response than just trying to put the original square wave signal directly into the chip-amp inputs.

Last edited by gootee; 12th September 2013 at 02:10 AM.
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Old 12th September 2013, 02:07 AM   #36
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Quote:
Originally Posted by gootee View Post
Yeah, LT-Spice is really a great aid to understanding, as long as you always try to be sure that the results are "reasonable", and also are not "too good to be true" because of some built-in ideal-ness or unrealistically-perfect symmetry, or whatever. (But it does make me wish that my computer was at least 100X faster.)
Agree. To get decent feedback, in a decent timeframe, one needs to learn to play with the various settings, not be scared of doing 'rough' sweeps to get quick indications of where interesting things may be happening ... and then 'zooming' in with finer resolution of the simulation engine in the key areas ...

Quote:
The discussion group at yahoogroups is also truly excellent.
That's what you think! The curse of Twitter and Facebook has struck, and there's a new interface which is bloody awful!! Hopefully, somebody will get sensible, and move the discussion group to another site which is not such a mess ...
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Old 12th September 2013, 02:08 AM   #37
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Originally Posted by fas42 View Post
Having fun, Richard ...?
Most certainly! This stuff really is fascinating me, hard to say why.....

Quote:
I 'cheat' here ... use regulators to get the job done - to me, this is the smarter way to go ...
Yes I adopted an LM338 reg on my chipamp but still I got improvement in SQ by adding on more caps. Not only that but the PSU noise as recorded reduced too. If the reg was doing the heavy lifting already, why would this happen? Admittedly I'm not at the 400,000uF level yet, I gave up at 140,000uF as I figured the amp was becoming too unstable (physically, not electrically).

Yep, agree its all about finding a particular local optimum, not taking everything to extremes..... Some extremes are really fun though aren't they in terms of understanding what's really important to the SQ.

As an aside to this, I was earlier this week searching on Taobao for caps and noticed there are a lot of choices of very high voltage lytics (400V-450V). When I did the math I found such caps have considerably better energy storage per unit volume than the caps used for chipamps (say 35V working voltage and below). Its something like a 4X improvement. Anyone else noticed this? Transformers came to mind next....
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Old 12th September 2013, 02:17 AM   #38
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Quote:
Originally Posted by gootee View Post
It was lovely to see how smart the outer feedback loop could seem. For example, for a square wave signal, the input to the chip amps would contain a spike, to jumpstart the rise time, and then another one the opposite way to make it instantly stop rising, to turn a perfect corner and become the flat top of the square wave (and similarly for the falling edge). It had WAY better transient response than just trying to put the original square wave signal directly into the chip-amp inputs.
Feedback is something that one 'needs' to develop an intuition for, as to how it "really works". As you say, it's 'clever' enough to compensate for the amp's "lack of performance" - which is what it's all about ...
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Old 12th September 2013, 02:34 AM   #39
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Quote:
Originally Posted by abraxalito View Post
Yes I adopted an LM338 reg on my chipamp but still I got improvement in SQ by adding on more caps. Not only that but the PSU noise as recorded reduced too. If the reg was doing the heavy lifting already, why would this happen?
Interesting ... there are some subtleties happening there, interactions which are not obvious, because of layout, stray parasitics, qualities of the components - it's a fine dance indeed ...

Quote:
Some extremes are really fun though aren't they in terms of understanding what's really important to the SQ.

As an aside to this, I was earlier this week searching on Taobao for caps and noticed there are a lot of choices of very high voltage lytics (400V-450V). When I did the math I found such caps have considerably better energy storage per unit volume than the caps used for chipamps (say 35V working voltage and below). Its something like a 4X improvement. Anyone else noticed this? Transformers came to mind next....
The thirst for understanding certainly plays a part, and is all good ...

There are certainly "sweet spots" for capacitors, depending upon precisely how they're made. At one stage I spent weeks going through the catalogues, comparing and contrasting the offerings from all the companies, to get a sense of precisely which capacitor, from which company, for the money, was optimum ...
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Old 12th September 2013, 02:42 AM   #40
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Yes there are sweetspots for caps - I also trawled various datasheets looking for support for hypotheses like '35V has the lowest ESR'. Sweetspots though are spots, by definition. Here in looking at high voltage caps though, its a whole vast prairie of sweetness, just there aren't any chipamps with 450V supply ratings to leverage it....
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