Super regulator and cable length

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tonyptony

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Joined 2006
I have two of Per Anders' SSR01 super regs ready to supply power to parts of my Shiga clone. The SSR01s themselves will be situated as close as possible to the target portions of the circuit. But I was wondering about the length of the cabling from the linear feeder regulators to the SSR01s' input.

Each linear has its own transformer, so I was thinking on the one hand it might be a good idea to get that part of the supply into a separate enclosure and feed the output of the linears into the box housing the SSR01s. But that would result in pretty long cables between linears and super regs. Wasn't sure if that was not a good thing to do - excessive inductance etc. Advice appreciated.
 
T

tonyptony

Member
Joined 2006
AndrewT said:
The output cabling of the reg is critical to what the circuit sees as source impedance.
Click to expand...

Agree. My plan is to keep this as short as possible.

AndrewT said:
The input cabling to the reg is immaterial provided you have adequate decoupling.
Click to expand...

I suspect there's a thread here somewhere that explains how to figure this out. :) Could you point me in the right direction, or (if there isn't) give me some groundrules for how to insure the right decoupling is in place?
 
Mark Johnson

Mark Johnson

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Joined 2011
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One way to get a rough idea of the minimum capacitance needed at the input of a regulator, might be the following

  1. Determine or guess the maximum possible load current the regulator will ever supply: Iout
  2. Assume that 100% of the load current is drawn from the capacitance at the input to the regulator - which is not true, but it is a worst case assumption
  3. Now apply the differential equation for a capacitor: Icap = C * (deltaVcap / deltaT) and isolate C
  4. C = (Icap * deltaT) / deltaVcap
  5. Assume the capacitance at the input of the regulator, must supply Iout for a certain length of time. A worst case assumption would be, an entire half-period of the AC mains (10 milliseconds in UK). This means deltaT = 0.01 seconds.
  6. Assume the input of the regulator must not droop more than 0.1 volts (100 millivolts) while supplying Iout. Thus deltaVcap = 0.1
  7. Insert these numbers into the capacitor equation: C = (Iout * 0.01) / 0.1
Which gives this final worst case result: C = 0.1 * Iout. For every ampere of maximum output current, provide 0.1 farads (100,000 microfarads) of capacitance.
  • If Iout = 1 mA, C = 100 uF
  • If Iout = 10 mA, C = 1,000 uF
  • If Iout = 100 mA, C = 10,000 uF
  • etc
Naturally, you are free to plug in your own assumed values in step 5 (float time) and in step 6 (permitted input deltaV). Maybe my assumptions are not worst-case enough for you; or maybe you find them to be ridiculous overkill.

Another way to make a float time assumption (step 5), might consider the RC timeconstant of charging the input capacitor at the regulator. "C" is of course the input capacitance, and "R" is the total charging resistance (ESR of "C" + cabling resistance (go and return) between regulator and rectifier bridge + ESR of filter caps at the rectifier bridge). Multiply by 4 or some other safety factor.
 
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