For the love of an art a man will venture forth.
That's a rather-beautiful statement, Harrison.
Tom,
I am busy with the power supply (transformer) design of our new amplifier using the predictions of your spreadsheets and will early in the new year post some practical measurements against the predictions. Thank you for all the effort you have spent regarding this thread. I the same breath a very prosperous New Year to you and all the members reading this thread.
I am busy with the power supply (transformer) design of our new amplifier using the predictions of your spreadsheets and will early in the new year post some practical measurements against the predictions. Thank you for all the effort you have spent regarding this thread. I the same breath a very prosperous New Year to you and all the members reading this thread.
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Have fun, Nico. Spice would be more powerful. Maybe it would be a good time to become more familiar with it. I can send you a ready-to-run LT-Spice model, if you want it.
The only spreadsheet of mine that I trust completely is any version of this latest one, which actually solves the differential equations. The older ones are probably useful but remember that they were based on approximations, which break down more and more as they approach some extreme (e.g. when ripple gets large, especially).
Thank you for the new year wishes and know that I hope that the coming year is your best year, so far, in every way.
Tom
The only spreadsheet of mine that I trust completely is any version of this latest one, which actually solves the differential equations. The older ones are probably useful but remember that they were based on approximations, which break down more and more as they approach some extreme (e.g. when ripple gets large, especially).
Thank you for the new year wishes and know that I hope that the coming year is your best year, so far, in every way.
Tom
Member
Joined 2009
Paid Member
This is an important factor
I have seen accounts where people have found subjectively better sound (to their taste) from amplifiers that are slightly under-damped. The power supply dynamic response is under-damped. In other words, transients are allowed some overshoot. This can be achieved through design of the power supply, and the choice of capacitors has a big bearing on the transient response. I believe it can also be achieved with design of the feedback compensation.
I have seen accounts where people have found subjectively better sound (to their taste) from amplifiers that are slightly under-damped. The power supply dynamic response is under-damped. In other words, transients are allowed some overshoot. This can be achieved through design of the power supply, and the choice of capacitors has a big bearing on the transient response. I believe it can also be achieved with design of the feedback compensation.
Calculating Required Capacitor (Capacitance) Value
[This is adapted from a post at http://www.diyaudio.com/forums/chip...-rms-power-5-watt-chip-amp-5.html#post3318986 , where I also derived equations involving simpler linear capacitor currents.]
The power supply is The Signal Path:
The audible signal in an electronic music reproduction system is electric current that comes directly from the reservoir capacitors of the power supply (and occasionally from farther upstream, if the rectifiers are conducting), or, whenever possible, from the decoupling capacitors nearer to the power output devices (which includes discrete transistors, chipamps, and vacuum tubes), as allowed by the modulated resistance of the power output devices, from which it flows to the speakers and then back to the power supply.
For accurate reproduction of the input signal that is used to modulate the resistance of the power output devices, the reservoir and decoupling capacitors, and the power and ground conductors, must be able to accurately provide the commanded current flow.
To try to ensure that the capacitors and conductors can always accurately provide the commanded current signal, an amplifier designer must ensure that it is at least theoretically possible for their chosen configuration of capacitors and conductors to satisfy the worst-case current amplitude and timing demands that might occur.
The capacitor equations that I have previously derived were all in terms of linear (straight-line) Δi changes in the current needed from a capacitor, during a time interval Δt, and their relationships to capacitance, ESR, and simultaneous changes in the voltage across the capacitor.
Since music signals are not usually straight lines when plotted vs time, those earlier equations might be useful for planning the handling of worst-case fast transient current demands, such as square-wave edges, but they might not be as useful for ensuring that our capacitors can meet the demands of low-frequency (bass) music signals, for example, or other music signals.
All real-world music signals, and most other types of real-world time-varying signals, can be broken down into a sum of single-frequency sinusoidal components. So if we could calculate, for example, the characteristics of the capacitance and conductors needed to meet the electric current demands for the reproductions of a single sinusoidal signal, then the calculation method should eventually be able to be extended, to enable dealing directly with more-complex "real world" signals. And until then, it will still be useful for calculating a required capacitance, for any frequency of signal.
This time I will start at the beginning and derive everything from scratch, the right way.
The ideal capacitor's differential equation is:
i(t) = C dv/dt
or
dv/dt = i(t)/C
where dv/dt is the time rate of change of the voltage across the capacitor and i(t) is the current flowing into the designated-positive-voltage lead of the capacitor at any time t >= 0.
We can integrate both sides of that equation, in order to have v(t) instead of dv/dt:
(9): v(t) = (1/C) ∫ i(t) dt + v(0)
where v(t) is the voltage across the capacitor at any time t (>= 0), and the integral must be understood to be evaluated from 0 to t (because this forum doesn't enable me to put the limits by the integral sign).
Re-arranging a little, we get
v(t) - v(0) = (1/C) ∫ i(t) dt
which can be expressed using "delta" notation, as
(10): Δv(t) = (1/C) ∫ i(t) dt
where Δv(t) is the change in the voltage across the capacitor due to the capacitor current i(t) existing since t = 0, at any time t >= 0.
Since the capacitor's ESR is a simple resistance, which adds a positive component to the capacitor's voltage for positive current i(t) into the positive-designated end of a capacitor, we can include the ESR terms in the Δv equation and validate them "by inspection":
(11): Δv(t) = (1/C) ∫ i(t) dt + ESR∙i(t) - ESR∙i(0)
That equation for Δv should be valid for any real-world current signal, i(t), at every time t >= 0.
Therefore, we could select i(t) = a∙sin(ωt), noting that the integral with respect to time of a∙sin(ωt) = -(a/ω)∙cos(ωt).
Substituting i(t) = a∙sin(ωt) into equation (11), we have
(12): Δv(t) = (1/C) ∫ a∙sin(ωt) dt + ESR∙a∙sin(ωt) - ESR∙a∙sin(0)
Integrating and evaluating from 0 to t gives:
Δv(t) = (-a/ωC) cos(ωt) - (-a/ωC) cos(0) + ESR∙a∙sin(ωt)
and we get
(13): Δv(t) = ( a / ωC )∙( 1 - cos(ωt) ) + ESR∙a∙sin(ωt)
where a is the peak value of the sine current from capacitance C, w is 2πf, and ESR is the capacitance's equivalent series resistance.
I'll leave out the math but equation (13) also provides a way to calculate the maximum Δv. It usually occurs when the cos term = -1, and is
(13a): Δv_MAX ≤ a / (πfC)
which occurs when when t = 1 / (2f) [and at multiples of 1/f]
or
(13b): C ≥ a / (πfΔv_MAX)
where a is the 0-to-peak amplitude of the capacitor's sinusoidal current waveform, f is frequency in Hertz, and C is capacitance in Farads.
Example: If you have a 100 Watts output into 8 Ohms, of a 30 Hz sine wave, the RMS current must be sqrt(100/8) = 3.5 Amps RMS. So the peak current is sqrt(2) x 3.5 = 5 Amps peak (and 40 Volts peak).
According to equation (13a), the maximum voltage dip caused by drawing a 5-amps-peak 30 Hz sine wave from a capacitance C must be
Δv_MAX(30Hz, 5A pk) = 5 / (3.14 x 30 x C) = 0.05305 / C
or
C = 0.05305 / Δv_MAX(30Hz, 5A pk)
If we want Δv_MAX(30Hz, 5A pk) to be 1 Volt, then C = 53050 uF, for example.
---
For a decoupling capacitor, we might consider only the "leading edge" of the sinusoidal current wavefom, in which case we could think of the 0-to-peak amplitude of the sine wave as Δi, giving (from equation (13))
(14): Δv(t) = (Δi/ωC)∙(1 - cos(ωt)) + ESR∙Δi∙sin(ωt)
But since for decoupling we might only care about the signal's leading edge, or rise time, we can consider only the part of a∙sin(wt) between t=0 and the first peak, which occurs when ωt = π/2.
But cos(π/2) = 0 and sin(π/2) = 1, which gives us
(15): Δv = (Δi/ωC) + ESR∙Δi (for initial rise of sine wave, only)
And ω = 2πf, giving:
(16): Δv = Δi∙(ESR + (1/(2πfC)))
Solving for C and setting the proper inequality gives
(17): C ≥ Δi / ( 2πf∙(Δv - (ESR∙Δi)))
Equation (17) gives the capacitance value, C, that would be required in order to supply the current for the first quarter-cycle of a sine signal of frequency f (in Hz), with 0-to-peak amplitude Δi Amperes, while causing the voltage across the capacitor to dip by no more than your choice of Δv Volts.
To use equation (17), it will be easier to first set ESR to zero, calculate a C value, find an estimate for ESR for that C value at the frequency being used, and then re-calculate the C value with the ESR value.
If we still want to just account for the whole sine wave, we should be able to simply double the C value given by equation (17), since we're considering only the positive or negative half-cycle, but not both, and the other half of the half-cycle of a sine wave is symmetrical and thus encloses the same area (its integral), i.e. the same amp-seconds value, as the first half.
[Not bad for an old guy who had forgotten almost all of the mathematics he learned, which was over thirty-five years ago.]
Cheers,
Tom Gootee
[This is adapted from a post at http://www.diyaudio.com/forums/chip...-rms-power-5-watt-chip-amp-5.html#post3318986 , where I also derived equations involving simpler linear capacitor currents.]
The power supply is The Signal Path:
The audible signal in an electronic music reproduction system is electric current that comes directly from the reservoir capacitors of the power supply (and occasionally from farther upstream, if the rectifiers are conducting), or, whenever possible, from the decoupling capacitors nearer to the power output devices (which includes discrete transistors, chipamps, and vacuum tubes), as allowed by the modulated resistance of the power output devices, from which it flows to the speakers and then back to the power supply.
For accurate reproduction of the input signal that is used to modulate the resistance of the power output devices, the reservoir and decoupling capacitors, and the power and ground conductors, must be able to accurately provide the commanded current flow.
To try to ensure that the capacitors and conductors can always accurately provide the commanded current signal, an amplifier designer must ensure that it is at least theoretically possible for their chosen configuration of capacitors and conductors to satisfy the worst-case current amplitude and timing demands that might occur.
The capacitor equations that I have previously derived were all in terms of linear (straight-line) Δi changes in the current needed from a capacitor, during a time interval Δt, and their relationships to capacitance, ESR, and simultaneous changes in the voltage across the capacitor.
Since music signals are not usually straight lines when plotted vs time, those earlier equations might be useful for planning the handling of worst-case fast transient current demands, such as square-wave edges, but they might not be as useful for ensuring that our capacitors can meet the demands of low-frequency (bass) music signals, for example, or other music signals.
All real-world music signals, and most other types of real-world time-varying signals, can be broken down into a sum of single-frequency sinusoidal components. So if we could calculate, for example, the characteristics of the capacitance and conductors needed to meet the electric current demands for the reproductions of a single sinusoidal signal, then the calculation method should eventually be able to be extended, to enable dealing directly with more-complex "real world" signals. And until then, it will still be useful for calculating a required capacitance, for any frequency of signal.
This time I will start at the beginning and derive everything from scratch, the right way.
The ideal capacitor's differential equation is:
i(t) = C dv/dt
or
dv/dt = i(t)/C
where dv/dt is the time rate of change of the voltage across the capacitor and i(t) is the current flowing into the designated-positive-voltage lead of the capacitor at any time t >= 0.
We can integrate both sides of that equation, in order to have v(t) instead of dv/dt:
(9): v(t) = (1/C) ∫ i(t) dt + v(0)
where v(t) is the voltage across the capacitor at any time t (>= 0), and the integral must be understood to be evaluated from 0 to t (because this forum doesn't enable me to put the limits by the integral sign).
Re-arranging a little, we get
v(t) - v(0) = (1/C) ∫ i(t) dt
which can be expressed using "delta" notation, as
(10): Δv(t) = (1/C) ∫ i(t) dt
where Δv(t) is the change in the voltage across the capacitor due to the capacitor current i(t) existing since t = 0, at any time t >= 0.
Since the capacitor's ESR is a simple resistance, which adds a positive component to the capacitor's voltage for positive current i(t) into the positive-designated end of a capacitor, we can include the ESR terms in the Δv equation and validate them "by inspection":
(11): Δv(t) = (1/C) ∫ i(t) dt + ESR∙i(t) - ESR∙i(0)
That equation for Δv should be valid for any real-world current signal, i(t), at every time t >= 0.
Therefore, we could select i(t) = a∙sin(ωt), noting that the integral with respect to time of a∙sin(ωt) = -(a/ω)∙cos(ωt).
Substituting i(t) = a∙sin(ωt) into equation (11), we have
(12): Δv(t) = (1/C) ∫ a∙sin(ωt) dt + ESR∙a∙sin(ωt) - ESR∙a∙sin(0)
Integrating and evaluating from 0 to t gives:
Δv(t) = (-a/ωC) cos(ωt) - (-a/ωC) cos(0) + ESR∙a∙sin(ωt)
and we get
(13): Δv(t) = ( a / ωC )∙( 1 - cos(ωt) ) + ESR∙a∙sin(ωt)
where a is the peak value of the sine current from capacitance C, w is 2πf, and ESR is the capacitance's equivalent series resistance.
I'll leave out the math but equation (13) also provides a way to calculate the maximum Δv. It usually occurs when the cos term = -1, and is
(13a): Δv_MAX ≤ a / (πfC)
which occurs when when t = 1 / (2f) [and at multiples of 1/f]
or
(13b): C ≥ a / (πfΔv_MAX)
where a is the 0-to-peak amplitude of the capacitor's sinusoidal current waveform, f is frequency in Hertz, and C is capacitance in Farads.
Example: If you have a 100 Watts output into 8 Ohms, of a 30 Hz sine wave, the RMS current must be sqrt(100/8) = 3.5 Amps RMS. So the peak current is sqrt(2) x 3.5 = 5 Amps peak (and 40 Volts peak).
According to equation (13a), the maximum voltage dip caused by drawing a 5-amps-peak 30 Hz sine wave from a capacitance C must be
Δv_MAX(30Hz, 5A pk) = 5 / (3.14 x 30 x C) = 0.05305 / C
or
C = 0.05305 / Δv_MAX(30Hz, 5A pk)
If we want Δv_MAX(30Hz, 5A pk) to be 1 Volt, then C = 53050 uF, for example.
---
For a decoupling capacitor, we might consider only the "leading edge" of the sinusoidal current wavefom, in which case we could think of the 0-to-peak amplitude of the sine wave as Δi, giving (from equation (13))
(14): Δv(t) = (Δi/ωC)∙(1 - cos(ωt)) + ESR∙Δi∙sin(ωt)
But since for decoupling we might only care about the signal's leading edge, or rise time, we can consider only the part of a∙sin(wt) between t=0 and the first peak, which occurs when ωt = π/2.
But cos(π/2) = 0 and sin(π/2) = 1, which gives us
(15): Δv = (Δi/ωC) + ESR∙Δi (for initial rise of sine wave, only)
And ω = 2πf, giving:
(16): Δv = Δi∙(ESR + (1/(2πfC)))
Solving for C and setting the proper inequality gives
(17): C ≥ Δi / ( 2πf∙(Δv - (ESR∙Δi)))
Equation (17) gives the capacitance value, C, that would be required in order to supply the current for the first quarter-cycle of a sine signal of frequency f (in Hz), with 0-to-peak amplitude Δi Amperes, while causing the voltage across the capacitor to dip by no more than your choice of Δv Volts.
To use equation (17), it will be easier to first set ESR to zero, calculate a C value, find an estimate for ESR for that C value at the frequency being used, and then re-calculate the C value with the ESR value.
If we still want to just account for the whole sine wave, we should be able to simply double the C value given by equation (17), since we're considering only the positive or negative half-cycle, but not both, and the other half of the half-cycle of a sine wave is symmetrical and thus encloses the same area (its integral), i.e. the same amp-seconds value, as the first half.
[Not bad for an old guy who had forgotten almost all of the mathematics he learned, which was over thirty-five years ago.]
Cheers,
Tom Gootee
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We can see that if Δv - (ESR∙Δi) = 0, in equation (17), then C would be infinitely large.
To understand "why", we can write it slightly differently:
Δv = ESR∙Δi
or
Δv / Δi = ESR
But notice that Δv/Δi is the impedance we would need to stay below, in terms of the impedance that the active devices would "see", if the voltage should never change by more than Δv, for any Δi.
The ESR is the minimum impedance we can get, with a capacitor. So if the ESR is already as large as Δv/Δi, then we have already failed to meet the most-basic need of the power-distribution circuit, which would be required in order to meet our Δv/Δi specification.
That simply means that we need to try to make the ESR be much less than our desired Δv/Δi. Otherwise, the required capacitance value will be excessive.
To understand "why", we can write it slightly differently:
Δv = ESR∙Δi
or
Δv / Δi = ESR
But notice that Δv/Δi is the impedance we would need to stay below, in terms of the impedance that the active devices would "see", if the voltage should never change by more than Δv, for any Δi.
The ESR is the minimum impedance we can get, with a capacitor. So if the ESR is already as large as Δv/Δi, then we have already failed to meet the most-basic need of the power-distribution circuit, which would be required in order to meet our Δv/Δi specification.
That simply means that we need to try to make the ESR be much less than our desired Δv/Δi. Otherwise, the required capacitance value will be excessive.
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Nice to see some real engineering in the forum!
This calculation does for the last capacitor in a PSU the same sort of job which a ripple calculation does for the first capacitor. For some SS power amps they may be the same capacitor, in which case I think the ripple calculation dominates.
Your delta-V is set by the amp PSRR and the required headroom, just like for the ripple calc. By oversizing the transformer you can reduce the cap size. However, it could be that for some amps the gain depends on supply rail voltage so delta-V may need to be kept small to reduce IM.
This calculation does for the last capacitor in a PSU the same sort of job which a ripple calculation does for the first capacitor. For some SS power amps they may be the same capacitor, in which case I think the ripple calculation dominates.
Your delta-V is set by the amp PSRR and the required headroom, just like for the ripple calc. By oversizing the transformer you can reduce the cap size. However, it could be that for some amps the gain depends on supply rail voltage so delta-V may need to be kept small to reduce IM.
Originally Posted by AKSA
In this I'm reminded of subjective bass response of amps. If you have an amp with a single output pair, bipolar or mosfet, and relatively high Zout, you can actually improve subjective bass response by interposing a small 0.15R resistor into the speaker output line. This promotes overshoot on the voice coil - that is, loss of VC control - but adds a subjectively stronger bass response. Hardly correct in engineering terms, but quite useful when sculpting bass presentation. Perhaps something similar is operating here?
Which is Why the idea of Speaker Wires affecting sound has a small basis in reality
In this I'm reminded of subjective bass response of amps. If you have an amp with a single output pair, bipolar or mosfet, and relatively high Zout, you can actually improve subjective bass response by interposing a small 0.15R resistor into the speaker output line. This promotes overshoot on the voice coil - that is, loss of VC control - but adds a subjectively stronger bass response. Hardly correct in engineering terms, but quite useful when sculpting bass presentation. Perhaps something similar is operating here?
Which is Why the idea of Speaker Wires affecting sound has a small basis in reality
Thanks, DF. I really appreciate that, especially coming from you. (But I probably feel more like an engineering student than an engineer, at least on this subject.)
Yes, I had decoupling caps in mind, partially, but also just the ablity of a cap, in any situation, to be an accurate source for low-frequency maximum-amplitude sine output currents (or any frequency).
I also noticed that if we take the equation relating frequency content and rise time that I saw in Henry Ott's EMC Engineering book, trise = 1 / (πf) and substitute it into, for example, equations like 13a, 13b, and even 17, as a Δt in the numerator, those equations suddenly look much more familiar. I just thought that was interesting.
By the way, I did verify that LT-Spice simulations give _exactly_ the same numbers as the equations do.
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DF,
How would we set the Δv_max based on the PSRR and the required headroom?
Also, after thinking about it again, I don't believe that we can say that the ripple calculation would "dominate". I think that "the ripple calculation" would be dependent on the current-supplying events required by the music signal. When real music is playing, at significant output power levels, we will almost never see a textbook-type periodic ripple waveform. We WILL see ripple CURRENT that IS, almost exactly, the music signal. And due to the caps' ESRs and the voltage variation due to the music current being discharged, the ripple voltage might then also somewhat-resemble the music signal. I showed the caps' currents, almost exactly matching the music signal, before, at:
http://www.diyaudio.com/forums/power-supplies/216409-power-supply-resevoir-size-38.html#post3117390
So what actually happens?
Without the rectifiers in the circuit, the caps' voltage would be according to equation 11 that I gave before:
(11a): v(t) = (1/C) ∫ i(t) dt + ESR∙i(t) - ESR∙i(0) + v(0)
where the integral is from 0 to t.
In that equation, i(t), the capacitor inflow current, is simply -iload(t):
(18): i(t) = -iload(t)
But WITH a rectifier, we would have irect(t) = i(t) + iload(t), so now
(19): i(t) = irect(t) - iload(t)
i.e. the load current is no longer necessarily just the negative of the cap current, except when the rectifier is not conducting.
So we would have the now-familiar case where the system switches between a first-order differential equation, when the rectifier is not conducting, and a second-order equation (if transformer leakage inductance is included), when the rectifier is conducting. We could use essentially the same numerical solution of the differential equation(s) as I used in the spreadsheet, except using the music current instead of the constant load current, which would probably complicate the calculation of the rectifier turn-on and turn-off times.
The present spreadsheet doesn't do that, of course, but the constant current that it does assume, with amplitude equal to the maximum peak sine current for a given rated sine output power, should still give the worst-case minimum v(t), including for any music signal, even though with music the ripple voltage waveform would have a completely different shape.
We could also write some inequality that would enable us to determine when v(t) would fall below the specified ripple voltage minimum value, but again, we would have to integrate the music current to be able to get a numerical answer.
And we could derive an equation that would tell us whether or not the caps' voltage would be able to be sustained, by the charging pulses, within the specified ripple envelope or if they could instead be drained to lower and lower voltages, which would let us determine the required charging pulse capability. But again, we would have to integrate the music current to get a numerical answer.
At any rate, the caps are still providing current, but that current is the music, and so the ripple voltage will be irregular, compared to the usual case of an average current or a worst-case constant current. So the "true" ripple calculations, while still mathematically possible, are probably most-easily done (and are definitely more-easily generalized) by considering a bounding case, as the spreadsheet does.
Sorry if that went off-point.
Regards,
Tom
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this bounding case is seen as clipping of the signal.
We can see that easily on a scope with both sinewave and with music.
There is a tertiary case: The signal gets progressively more distorted as clipping is approached. I have seen FFT plots showing the increase of high harmonics as clipping is approached. I suspect this tertiary case is showing the effect of non linearity of the amplifier as Vce of some devices becomes similar to Vbe or even worse becomes less than Vbe. As device Vce approaches zero, then we see the bounding case of clipping.
If the ripple calculation assumes the worst-case current draw, as it should, then no music current will exceed this. Music at frequencies higher than the (doubled) supply frequency are guaranteed to draw less than the worst case, as for part of the time between charging pulses the music will be drawing current from the other supply rail. Music at frequencies lower than this can only draw the worst case current, and no more. I think we are agreeing?
The only exception to this would occur if capacitor stray inductance (+wiring) caused extra voltage drop for higher frequencies, but in reality this inductance is just as likely to reduce the voltage drop across much of the audio range as it has the opposite sign to the capacitive reactance. Naive bypassing could screw this up, but people using naive bypassing are unlikely to do ripple calcs anyway.
Now if the final PSU cap is well separated (electrically) from the reservoir cap (e.g. by a choke) then the ripple requirements for the reservoir cap and the music current requirements for the final cap get partly decoupled. We can assume the final cap gets fed with a DC current which on average is exactly right to meet music current requirements. The problem now is that the voltage drop in the final cap has to be added on to the average DC droop (i.e. half the maximum droop) in the reservoir cap. We can no longer count on the charging pulse to reset things every 10ms so low frequency requirements are more demanding. So if you have LC smoothing and you want good bass then the final cap may need to be larger than you would need for a single reservoir cap, as it may need to supply current for 25ms (half a cycle at 20Hz) rather than 10ms.
The only exception to this would occur if capacitor stray inductance (+wiring) caused extra voltage drop for higher frequencies, but in reality this inductance is just as likely to reduce the voltage drop across much of the audio range as it has the opposite sign to the capacitive reactance. Naive bypassing could screw this up, but people using naive bypassing are unlikely to do ripple calcs anyway.
Now if the final PSU cap is well separated (electrically) from the reservoir cap (e.g. by a choke) then the ripple requirements for the reservoir cap and the music current requirements for the final cap get partly decoupled. We can assume the final cap gets fed with a DC current which on average is exactly right to meet music current requirements. The problem now is that the voltage drop in the final cap has to be added on to the average DC droop (i.e. half the maximum droop) in the reservoir cap. We can no longer count on the charging pulse to reset things every 10ms so low frequency requirements are more demanding. So if you have LC smoothing and you want good bass then the final cap may need to be larger than you would need for a single reservoir cap, as it may need to supply current for 25ms (half a cycle at 20Hz) rather than 10ms.
Tom/DF/Frank,
following is a set of practical measurements from our latest commercial development. After the amplifier design was finalized and frozen the power supply was optimized with the objective that started this thread. The amp is essentially 100 watt into 8 Ohm and I will qualify this so that we are all aware of the criteria used to obtain the results.
The measurement was intended to detect any artifacts in the output signal compared to the input signal added by the amplifier while delivering the rated rms voltage across an 8.2 Ohm resistive load at 20 Hz sine wave input stimulus(mains =50Hz; 240VAC).
The observations were made by comparing the signals between the inverted (NFB) and non-inverted inputs of the amplifier under test using a scope with A-B and dB meter at rated output nulled at 1kHz as reference output.
The amplifier uses four pairs of L-MOSFET as output devices and 0.22 ohm non-inductive drain resistors. There is no current limit applied, no "zobel" across the output nor any series output inductor.
6.3 mm spade terminals were crimped to the caps so that we could connect several in parallel onto an 8 x 8mm copper, positive and negative rail.
A 35 Amp soft recovery fast bridge rectifier type SRDB-3500P-1A was used between the transformer and reservoir without any capacitors across the diodes. We used multiple Hitano ELP range 4700 uF/100V 30 mm diam caps to arrive at an observed optimum value.
We used the same 368VA toroidal transformer wound to supply 36 - 0 - 36 to 46V - 0 - 46 VAC at 2 V intervals (taps) for all measurements.
Our method consisted to set a transformer voltage by connecting to the lowest tap, then starting with 4700uF, and increase the capacitance until the differential voltage on the scope/meter was as low as possible.
If after adding further caps the difference was hard to detect we removed the last cap and returned to the 1 kHz reference signal to make sure this has either improved or remained the same as before.
We then stepped to the next transformer voltage and incremented the capacitance by 4700uF until we reached the point that an observed improvement was uncertain and so on.
The instruments used for this exercise was HP 54645A scope, HP 33120A function generator and HP 33401A multimeter.
The final results was achieved by using four paralleled 4700uF capacitors per rail and 42V setting on the transformer which was higher than one would expect the rail to be for a 100 watt amplifier. In fact the max average power measured with the final settings was 132 watt into 8 ohm (to produce the optimum performance at 100 watt which we find interesting)
Tom/DF/Frank can these observations be verified by any of the theoretical scenario?. There is still a lot of measurements and tests before the amp goes to production, thus I will perform other measurements you may require such as transformer inductance or what-ever is needed to plug into the formulas.
I will not divulge the schematic but it consists of a typical Hitachi topology using double differential amps driving L-MOSFETs, you all know the topology.
following is a set of practical measurements from our latest commercial development. After the amplifier design was finalized and frozen the power supply was optimized with the objective that started this thread. The amp is essentially 100 watt into 8 Ohm and I will qualify this so that we are all aware of the criteria used to obtain the results.
The measurement was intended to detect any artifacts in the output signal compared to the input signal added by the amplifier while delivering the rated rms voltage across an 8.2 Ohm resistive load at 20 Hz sine wave input stimulus(mains =50Hz; 240VAC).
The observations were made by comparing the signals between the inverted (NFB) and non-inverted inputs of the amplifier under test using a scope with A-B and dB meter at rated output nulled at 1kHz as reference output.
The amplifier uses four pairs of L-MOSFET as output devices and 0.22 ohm non-inductive drain resistors. There is no current limit applied, no "zobel" across the output nor any series output inductor.
6.3 mm spade terminals were crimped to the caps so that we could connect several in parallel onto an 8 x 8mm copper, positive and negative rail.
A 35 Amp soft recovery fast bridge rectifier type SRDB-3500P-1A was used between the transformer and reservoir without any capacitors across the diodes. We used multiple Hitano ELP range 4700 uF/100V 30 mm diam caps to arrive at an observed optimum value.
We used the same 368VA toroidal transformer wound to supply 36 - 0 - 36 to 46V - 0 - 46 VAC at 2 V intervals (taps) for all measurements.
Our method consisted to set a transformer voltage by connecting to the lowest tap, then starting with 4700uF, and increase the capacitance until the differential voltage on the scope/meter was as low as possible.
If after adding further caps the difference was hard to detect we removed the last cap and returned to the 1 kHz reference signal to make sure this has either improved or remained the same as before.
We then stepped to the next transformer voltage and incremented the capacitance by 4700uF until we reached the point that an observed improvement was uncertain and so on.
The instruments used for this exercise was HP 54645A scope, HP 33120A function generator and HP 33401A multimeter.
The final results was achieved by using four paralleled 4700uF capacitors per rail and 42V setting on the transformer which was higher than one would expect the rail to be for a 100 watt amplifier. In fact the max average power measured with the final settings was 132 watt into 8 ohm (to produce the optimum performance at 100 watt which we find interesting)
Tom/DF/Frank can these observations be verified by any of the theoretical scenario?. There is still a lot of measurements and tests before the amp goes to production, thus I will perform other measurements you may require such as transformer inductance or what-ever is needed to plug into the formulas.
I will not divulge the schematic but it consists of a typical Hitachi topology using double differential amps driving L-MOSFETs, you all know the topology.
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Quick back-of-envelope calculations at 100W say the peak current will be about 5A, so voltage droop will be 2.7V over 10ms. Allowing 1.5V drop in the bridge, say 4V in the output stage (including 0.22R), gives a requirement of 34V RMS. Add 15% to get 132W means 39V RMS. Not too far off 42V?
It could be that the FET output devices are a bit 'softer' than BJTs, so they drop a bit more voltage and begin to suffer earlier from insufficient headroom. Or maybe the circuit design has poor PSRR? PSRR has two aspects: direct injection of supply rail signals into the output, and supply rail variations modulating the gain and so creating IM.
Note that only a small part (33%) of the total difference between peak off-load DC and the on-load minimum comes from capacitor droop. This means that a small change in any of the other voltage factors will cause a big change in required cap value.
The calcs here take no account of transformer resistance and inductance, so must be regarded as best case.
It could be that the FET output devices are a bit 'softer' than BJTs, so they drop a bit more voltage and begin to suffer earlier from insufficient headroom. Or maybe the circuit design has poor PSRR? PSRR has two aspects: direct injection of supply rail signals into the output, and supply rail variations modulating the gain and so creating IM.
Note that only a small part (33%) of the total difference between peak off-load DC and the on-load minimum comes from capacitor droop. This means that a small change in any of the other voltage factors will cause a big change in required cap value.
The calcs here take no account of transformer resistance and inductance, so must be regarded as best case.
Hi DF, you are correct that the MOSFETS drop more voltage than BJTs as well as having a diode in series with the rails to decouple front end from the power end so the drive swing is slightly lower than if driven directly.
The DC power supply rails drop by about 2 V at 100watt/ch both channels driven into 8 ohms and no visible clipping.
I did not measure PSRR because I needed to finalize the power supply first laid out PCBs and all the good stuff in order to commence with CEA-490-A-R-2008 compliance testing to see if we make the grade else it is back to the drawing board.
Thank you for your input DF. I am also really keen to get some feed-back from Tom regarding a tie up between the spreadsheet and the measurements I got.
My last comment above might be of interest in that, although the amp was rated and tested for best performance at 100 watt, the transformer voltage had to be adjusted to be able to deliver 130 watt to provide the best performance at 100 w, thus adding three more capacitors had much less benefit than increasing the rail voltage a tad.
If you have any clues here it could make for an interesting comment.
The DC power supply rails drop by about 2 V at 100watt/ch both channels driven into 8 ohms and no visible clipping.
I did not measure PSRR because I needed to finalize the power supply first laid out PCBs and all the good stuff in order to commence with CEA-490-A-R-2008 compliance testing to see if we make the grade else it is back to the drawing board.
Thank you for your input DF. I am also really keen to get some feed-back from Tom regarding a tie up between the spreadsheet and the measurements I got.
My last comment above might be of interest in that, although the amp was rated and tested for best performance at 100 watt, the transformer voltage had to be adjusted to be able to deliver 130 watt to provide the best performance at 100 w, thus adding three more capacitors had much less benefit than increasing the rail voltage a tad.
If you have any clues here it could make for an interesting comment.
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I'll have a look anon in my Spice models, Nico, my laptop is not 100% at the moment, high temps
...But I will say that comment reminded me of results I was getting earlier on: if you're purely worried about voltage drop the easiest solution was to bump up the voltage from the transformer slightly, for a toroid just wrap a couple more turns around and add to the end of the secondary - problem solved!
Frank
Hi Frank see my comment above in Edit which I repeat here:
Seems that ½CV² should be considered against wire cost (in a few extra transformer windings) compared to additional Capacitor cost. Keep in mind I am looking at it from a commercial point of view.
My conclusion is that 48 J would could be an optimal reservoir energy required in the light of the test performed on a practical 100 watt into 8 ohm amplifier together with a 15% increase in expected rail voltage. Hope this makes sense.
This at the moment is applicable to 100 watt into 8 ohm since there have not been tests carried out on higher or lower rated L-MOSFET amps, it may be also somewhat different for BJTs.
Seems that ½CV² should be considered against wire cost (in a few extra transformer windings) compared to additional Capacitor cost. Keep in mind I am looking at it from a commercial point of view.
My conclusion is that 48 J would could be an optimal reservoir energy required in the light of the test performed on a practical 100 watt into 8 ohm amplifier together with a 15% increase in expected rail voltage. Hope this makes sense.
This at the moment is applicable to 100 watt into 8 ohm since there have not been tests carried out on higher or lower rated L-MOSFET amps, it may be also somewhat different for BJTs.
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Increasing the cap size means you droop less. Increasing the transformer voltage means you start higher up. Both mean your minimum voltage is raised. Once the capacitor droop becomes a small proportion of the total voltage drop, as is the case here, then a small increase in transformer voltage does more than a big increase in cap value. This was made clear in the thread, on several occasions.
Am I providing free consultancy for a commercial product development?
Am I providing free consultancy for a commercial product development?
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