Power Supply Resevoir Size

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
There's no reason I know of to take out the diode on the positive rails - no chance of blowing it up there :) I'm working on a TDA7293 design at the moment and I'm going to run the positive driver pin (pin7) on a boosted, linear regulated supply. I suspect (though have no evidence) that positive PSRR is going to be better than negative so I'm borrowing a leaf from Klaus (KSTR)'s book here in referencing signals to the -ve rail.
Well, for using the diode to make the amp dull-proof even if the power supply tank is huge or the umbilical cable zero length, we can fake it and install an optional open sound generator, also fake of course.

So, it may be interesting to adopt bus rail, yet also do the polar opposite of the usual hard sound consequences. I didn't hit the middle ground yet, but this may be more fun.

In the photo, it needs RF filters, and it doesn't hurt or help if you add 2200uF either before or after the diodes. Take out or change the 0.5r if you didn't want miniscule reverb or try a 1R for a difference. It is scalable, like 0.7v for standard diode, 0.5v for fast, or 0.3v for schottky, and the resistor can be any value and 1/4 watt is okay since that much voltage drop is a light load. The main point is that the umbilical can be zero length and the power supply reservoir huge, without risk of a dulling.
 

Attachments

  • TDA7294.gif
    TDA7294.gif
    36.2 KB · Views: 154
Last edited:
Originally Posted by gootee (Tom: )
So the best way to think of it might be "resonant dips" and "impedance peaks". But even Henry W. Ott alternates between calling the peaks "impedance spikes", "resonant peaks", "resonant spikes", and "anti-resonance spikes".

(Frank: )At least I'm in good company ... . That said, using "impedance peaks" may help reduce confusion out there, so I shall aim to consistently use that term forthwith. But, the effect is still due to a resonance behaviour, between the L and C characteristics of separate parts, in the "anti-resonance spikes". If there were no L in the picture then these spikes would not occur, no matter what C values were in parallel; resonance is both a low and a high impedance behaviour


(Tom: )
And where decoupling needs to cover a wider range of frequencies, sometimes people attempt to choose multiple values of parallel caps so that their resonances are spread out over the needed frequency range. Problems are usually part of the result, because the multiple capacitors interact to cause high-impedance peaks in between the resonant dips, where high impedances are not wanted.

The resonance dips are usually "a good thing", in a decoupling or bypassing context. They "swallow" problem frequencies, optimally, if located there. They produce current transients optimally upon demand at frequencies where they are needed, if located there.

The impedance peaks (the "anti-resonance" points produced by interactions among multiple C values in LCL networks) are usually "a bad thing". If they are, say, 25 dB-high peaks, then noise and whatever else is around will be 25 dB higher in level, at those frequencies. And if current is needed at those frequencies, the response is very poor. And if an amplifier's high-frequency power rail feedback has content at an impedance-peak frequency, the amplifier would be likely to oscillate at that frequency.

There is usually not much of a problem if the paralleled capacitor values are within a 2-to-1 ratio, because then the spikes usually fall within the dips, greatly reducing their magnitudes. The severe problems occur mainly when the capacitor values differ by an order of magnitude or more, such as when paralleling small-value film caps and large-value electrolytics.

This is where I part ways with you, Tom, sorry. You'll have to show me with LTspice, say, where paralleling an electro and a film gets you into trouble. Note the thread, Mundorf M-Cap Supreme as bypass cap? where I talk at length about this stuff ...

Frank

Frank,

I haven't read any of that thread, yet. But I am sure that there are cases where anything could work well. And with a network analyzer, one could see exactly what one was doing and get away with even more, if necessary.

I am not an expert at any of this stuff, but, unless I misunderstood what he wrote, everything I wrote in the third quoted section above was paraphrased straight out of the latest edition of Henry W. Ott's book, "Electromagnetic Compatibility Engineering", sections 11.3 and 11.4 . He even goes as far as advocating only paralleling multiple capacitors of the same value.

Regards,

Tom

Edit: I have to leave you some "wiggle room" on the above: I just re-realized that sections 11.3. and 11.4 of Ott's book are mainly about decoupling for digital systems, and the capacitors being discussed were all small low-loss types, as far as I can see. And he does mention that the size, shape, and position of the anti-resonance peaks will depend on the ESRs of the caps (among other things).
 
Last edited:
OK, round 2, :D ...

Electro's have low Q because of their very nature, their construction. That is, if you look at a curve of impedance with frequency for such it will alway look like the bottom of a bathtub, which means low Q: high ESR for the value of C and L of the unit. And that relatively high ESR will always damp any resonance with respect to any adjacent capacitor, film or electro.

But 2 high Q cap's next to each other, film say, is asking for trouble, if you get the values wrong, because the ESR of either is insufficient to damp the resonance between them.

Yes, the bypassing needs to be where the transient current is required, within millimetres of the part, for the real benefit to be felt.

The confusion is in part where you think the power supply smoothing caps should be: in my world they should also be within a tiny distance of where the current actually does its work, not on the other side of the amp, because it's convenient to have them there, or it looks nice ... :D

Frank

Well I have to totally agree with you on where the PSU caps OUGHT to be placed. I guess I was speaking to the "usual" placement and power distribution habits of almost everyone else.

And you could almost convince me, with your ESR argument. And I would have no problem believing that it would be the case, at least some of the time. But don't really-big electrolytics usually have tiny ESRs?
 
Russian Roulette for the deaf? Paralleling random electrolytic caps with arbitrary 100nF polypro. Same as paralleling any woofer with whatever tweeter. There's going to be a crazy peak! Treble realism will be unoptimized. Needed amplifier heatsink may be more expensive/larger and amplifier power output potential or durability may be compromised.

Same person who does careless bypassing at the power circuit will probably spend days finding the perfect bypass cap to use with input and/or NFB caps. Well, the power caps need that much attention too.

But don't really-big electrolytics usually have tiny ESRs?
And higher inductance. So, the HF inefficiency happens differently for each different construction of cap.

Nichicon makes those tiny value electrolytic that can be used for bypassing larger electrolytics with much less chance of abrupt peaks. So, if one missed the value a bit, the consequences are minimal.
 
Last edited:
Edit: I have to leave you some "wiggle room" on the above: I just re-realized that sections 11.3. and 11.4 of Ott's book are mainly about decoupling for digital systems, and the capacitors being discussed were all small low-loss types, as far as I can see. And he does mention that the size, shape, and position of the anti-resonance peaks will depend on the ESRs of the caps (among other things).
Well, I guess I'm a lucky fellow, then ... ;)

I only have access to the previous edition, and there it's clear he's talking about high Q caps, digital is a whole different ball game compared to analogue niceties ... :D

Frank
 
Russian Roulette for the deaf? Paralleling random electrolytic caps with arbitrary 100nF polypro. Same as paralleling any woofer with whatever tweeter. There's going to be a crazy peak! Treble realism will be unoptimized. Needed amplifier heatsink may be more expensive/larger and amplifier power output potential or durability may be compromised.

Same person who does careless bypassing at the power circuit will probably spend days finding the perfect bypass cap to use with input and/or NFB caps. Well, the power caps need that much attention too.


And higher inductance. So, the HF inefficiency happens differently for each different construction of cap.

Nichicon makes those tiny value electrolytic that can be used for bypassing larger electrolytics with much less chance of abrupt peaks. So, if one missed the value a bit, the consequences are minimal.

Interesting. Do you have Ott's book? He says, "Some people consider this approach to be the equivalent of playing "Russian Roulette" ", in section 11.4.4, "Multiple Capacitors of Many Different Values", because, as he says, "One must hope that none of the clock harmonics fall on or near any of the resonant spikes.".
 
Well, I guess I'm a lucky fellow, then ... ;)

I only have access to the previous edition, and there it's clear he's talking about high Q caps, digital is a whole different ball game compared to analogue niceties ... :D

Frank

Dang! I thought I had you. But I'm glad that I realized my error before the editing time-limit passed.

Actually, there's a lot in that digital decoupling section that can also be applied at audio frequencies, or adapted for them.

I'm off to bed.
 
Incidentally I recently discovered that 50V 1uF X7R caps when biassed near to their maximum voltage lose more in ESR than they do in capacitance. When biassed up the capacitance is about half the nominal value but the ESR goes down by a factor of 4. The 1206 1uF shows a highly impressive 3mohm ESR on Kemet's capacitor simulation software. I plan to try a few in parallel on my next chipamp build.

After a bit more research, I have found that 4.7uF X5R is probably the sweet spot. If you buy 10k from Mouser they're $0.043 each which is more microfarads per dollar than the 1uFs. ESR isn't quite as low but its probably plenty low enough at 4mohm or so:D

UMK316AB7475KL-T Taiyo Yuden | Mouser
 
Well I have to totally agree with you on where the PSU caps OUGHT to be placed. I guess I was speaking to the "usual" placement and power distribution habits of almost everyone else.

And you could almost convince me, with your ESR argument. And I would have no problem believing that it would be the case, at least some of the time. But don't really-big electrolytics usually have tiny ESRs?
Yes, the ESR will be low, but it is still swamped by the size of the capacitance, as you say, it has to be very skillfully engineered to get something like decent ESRs. It's all about the shape of that V impedance curve with frequency: if it looks like a dumpy U then there are no resonance issues; if it looks like the end of a needle at the bottom then it will "spike" you, :).

Very simple for you to try this at home, with LTspice: drive a typical electro with a film cap in parallel, with the right parasitic values for both, and check the impedance with frequency. I spent weeks playing with values of real caps, years ago, to see how it all behaved in combinations ...

Frank
 
Interesting. Do you have Ott's book? He says, "Some people consider this approach to be the equivalent of playing "Russian Roulette" ", in section 11.4.4, "Multiple Capacitors of Many Different Values", because, as he says, "One must hope that none of the clock harmonics fall on or near any of the resonant spikes.".
Ah, no. I don't have the book. I was playing with my NFB cap. It is the same value as my amp decoupling caps. What's good for the gander was good for the goose. :) That's by design since it is a beginner friendly project (including me). The prospect is giving equal care to the power circuit. The pedantic HF power filtering assists realistic digital replay by not further convoluting the harmonics. The result is very cool running and effective.

Perhaps one does not get stunning clarity and epic soundstage without coming to similar/same conclusions as Ott does in his book?
Monkeys with typewriters eventually get Shakespeare . . . Cowboys with NFB caps eventually get Ott.
Wow! Really similar!! :D
Kind of related to Edison's thousand ways not to make a light bulb.
 
Last edited:
Perhaps one does not get stunning clarity and epic soundstage without coming to similar/same conclusions as Ott does in his book?
My "thing" (hahh!!) is that you can get perfect sound by having a perfect system ...

Definitions:

Perfect sound - no audible deficiencies, sounds as least as good as the "real thing". Throw any DBT at it, whatever, never fails to satisfy ...

Perfect system - enough problem areas have been investigated, sufficient weaknesses eradicated, all the tricky, subtle things that a lot of people miss, have been dealt with to an adequate level

So endeth the lesson for today, :rolleyes:, ;) ...

Frank
 
Of course not possible, I was just quibbling with the term, "desired impedance" - this should just be as small as possible, or else do the design and simulation work to find out how much you get away with it not being "perfect", i.e., zero ... :D

Frank

Frank your right my choice of words could have been better.
How about maximum impedance resulting in modulation of the amplifier output to less than audible levels.

I still claim that its this "less than audible levels" that is difficult to define. I don't know how one can do "design and simulation work" without defining this.

In my opinion the digital world is a good place to compare and take from. The techniques used there are just analog designs to maintain this impedance below some defined required level. We don't have to go as far (GHz range) and use all their measures (multilayer PCB's with "predetermined" amounts of embedded plane capacitances, multiple vias in pads etc).

The point is these digital designs start with defining the required impedance. It is not easy but using analog models for their switching and driving effects, in conjunction with meeting the components noise margin a required impedance curve can be derived.

When looking at impedance peaks especially with low esr and esl components the interconnect parasitics can't be ignored. My experience is there is much more damping in a built circuit than accounted for in most simple simulations.

Hope this helps
-Antonio
 
Magnoman, yep. the literature to look at is "signal integrity". herewith a couple of good ones:

Signal Integrity Characterization Techniques, Resso & Bogatin
Signal & Power Integrity Simplified - Bogatin
Digital Signal Integrity - Young
Signal & Power Integrity in Digital Systems - Buchanan

the last one is not the greatest book (its clearly a copy-n-pasta book) but has the advantage of being almost free - my 2nd hand copy cost me < $5 ($30 to ship to NZ though)
 
Reciprocity failure

Paralleling 2 caps cuts the inductance in half and that's an excellent idea for less noise other parts of an audio circuit, but did not help the individual units make less noise and did not make the caps charge at precisely the same time, since they're not quite perfect. SO how many caps can you parallel before reciprocity failure occurs turning the good idea to bad? Same question as how many slightly different noises can we stack before the slight differences add up to awful?
Ah, practicality invades.
The earlier idea of a horde of 1000u caps directly at the outputs of an audio amplifier board, was a good idea with the very worst dullest performance. Well, we're going to need to revise that to a smaller number of bigger caps, but then the question of how many persists.
How many noises are tolerable?
How many noises are needed?
Symmetrically and considering several larger values, I've guessed six as a rough estimate for the maximum number of caps that should be in a paralleled grouping, although more caps/groupings could be added with the separation of a long trace, a cable, a diode, or a resistor. However, the Real number of caps that can be paralleled before the good idea turns bad, will vary depending on the model and value of cap.
But, do we have a rule of thumb for it?
Maybe a guideline? Something simple?
 
Last edited:
Daniel,
There you go using those big words again, reciprocity.....:eek:

Point well taken though, that is why I poorly asked the question what the limit was in adding N number of small caps together to equal the equivalent capacitor values we are looking at. How did you settle on the number 6 as the upper limit though, experience or just a gut feeling? This subject like others has many factors taken together that can become N to a power more difficult when we look at the entire picture. :(

Steven
 
Reciprocity failure means, wasn't re-scalable indefinitely. For example multiply a cookie recipe to make a far larger batch of cookies, and then get surprised that they're quite weird and really flat. It can also mean when the inverse square law doesn't work as expected when at the extremes of supposedly linear photosensitive materials, and the term is most commonly seen when push processing film or using non-standard temperatures for bulk processing speed. In any of that, multiplying was going on, but there was a hidden difference included that got multiplied by a different proportion and made for poor results. For 20 parallel 1000u caps, the hidden difference is the manufacturing variances now awfully multiplied 20 times despite the assumption of perfect and there's dull audio consequences.
How did you settle on the number 6 as the upper limit though, experience or just a gut feeling?
I was looking at historical data and many different power supplies to find the amounts of parallel caps that support real examples. But, due to variable manufacturing tolerances of caps, a generally six parallel max is an unreliable estimate because it could be more for tight tolerance caps or less for looser tolerance caps. The more differences between individual caps, the more bad news we get and none are perfectly identical. It is perhaps, just a clue that if we're thinking of exceeding six for assuming perfect caps in parallel, then it may be time to do something better instead, with real components. I'd like for someone to propose a more accurate way to estimate.

Earlier, I was talking about a range of 2, 4, 5, or 6 same model parallel caps larger than 1000u (I meant in the range of 2,200u to 10,000u with a total range of 4,400u to 60,000u). Just notice the largest scale example is 60,000u and the transformer purchase was a fail if that isn't enough capacitance and so adding more caps is not needed, but rather the right size transformer could do a lot better.

And, earlier, I was asking a question.
 
Last edited:
Reciprocity failure is a term from photography, about exposure derived from aperture and time. When you parallel lots of caps you get the benefit of the Central Limit theorem which means that the result tends to the mean. Variations are not multiplied but diluted.

When anyone describes sound as 'dull' then I sometimes wonder "does he mean accurate?". However, in this case dullness could perhaps come from the extra inductance from all those extra cap connections.
 
When you parallel lots of caps you get the benefit of the Central Limit theorem which means that the result tends to the mean. Variations are not multiplied but diluted.

When anyone describes sound as 'dull' then I sometimes wonder "does he mean accurate?". However, in this case dullness could perhaps come from the extra inductance from all those extra cap connections.
If it is subtractive and in both cases, there seems to be, instead of 20 noises, there's 20 reference failures, in which case, it could be possible to select a "just right" bypass cap to restore the HF performance of the cap bank.
Do you think so?
 
As usual, I have difficulty translating your posts into the language of conventional circuit theory. If what is "subtractive"? "20 noises", "20 reference failures"?

Adding a bypass cap to a circuit with too much inductance could make things worse, unless enough damping is present. As others have said, the cap bank itself is not always the best place for any bypass. The outcome depends on many things, including the detailed layout.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.