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Old 20th September 2012, 05:51 AM   #1271
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Quote:
Originally Posted by danielwritesbac View Post
But, the point is. . . have a look at the power circuit. Did I do it like Hafler?
With that schematic you're potentially in trouble. That's because the substrate on the TDA7294 is connected to pin8, not to pin15. You can verify this with a multimeter - pin8 to case shows a short and pin15 to case doesn't.

ICs are designed to have their substrate at the most negative potential in the circuit - apply forward bias and you're likely granting an exit visa to that magic smoke. How do I know? I tried separating the supplies of pin8 from pin15 on the first breadboard I made with this chip. Do it at your own risk
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Old 20th September 2012, 05:54 AM   #1272
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Originally Posted by magnoman View Post
Daniel, Why are there smaller bypass caps (3.3nF) upstream of the diodes instead of at the supply?
Part of the capdiv noise trap, and those 3.3nF polyester are small enough to prevent the other caps from ringing and knock some noise off the power cable.
Anyway, so tiny that there's much less chance of causing trouble.
P.S.
That design is not yet complete. Bypass cap for all 3 identical models of 220u shown is easy and quick to determine at the NFB location, and if you keep it simple, same size bypass cap works for the other two 220u caps (if same model). Nobody will make a horrifying choice if they have to listen to it first at the NFB cap. But I can't specify a bypass cap value unless I also specify the exact model of electrolytic cap to use with it.
P.P.S.
3.3nF at the power board? Those are so small--Only way to have that bandwidth intact available for the amp is put 'em on the amp board.
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Old 20th September 2012, 06:04 AM   #1273
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Quote:
Originally Posted by abraxalito View Post
With that schematic you're potentially in trouble. That's because the substrate on the TDA7294 is connected to pin8, not to pin15. You can verify this with a multimeter - pin8 to case shows a short and pin15 to case doesn't. ICs are designed to have their substrate at the most negative potential in the circuit - apply forward bias and you're likely granting an exit visa to that magic smoke. How do I know? I tried separating the supplies of pin8 from pin15 on the first breadboard I made with this chip. Do it at your own risk
Thanks!
I've seen some designs using the diode drop with that chip; however, it is both experimental and optional.

Here's one simplified without the diodes (attached).
This one doesn't have "experimental" status, except that it needs the RF filters added. The amp shown plays well.
As a cost of subtracting the diodes, the tone will change depending on power supply arrangements and umbilical cable length.
However, the diodes (this time schottky) can be installed to the spots marked +30 and -30.
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File Type: gif TDA7294.gif (32.9 KB, 85 views)
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Last edited by danielwritesbac; 20th September 2012 at 06:15 AM.
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Old 20th September 2012, 06:05 AM   #1274
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Quote:
Originally Posted by gootee View Post
There is usually not much of a problem if the paralleled capacitor values are within a 2-to-1 ratio, because then the spikes usually fall within the dips, greatly reducing their magnitudes. The severe problems occur mainly when the capacitor values differ by an order of magnitude or more, such as when paralleling small-value film caps and large-value electrolytics.

Adding ANY capacitor, anywhere, is always actually the addition of an LCL network, because there is ALWAYS inductance in the capacitor and in its connections. The resulting LC networks ALWAYS have resonant frequencies. And multiple parallel LCL networks (i.e. any two or more paralleled capacitors of two or more different values) ALWAYS also have antiresonance impedance-peak frequencies, between their resonance-dip frequencies.
As regards the depth (or height) of resonances due to these effects, simulations are a poor estimator because they don't model skin and proximity effects. Hence Q's in practice will turn out to be lower than Q's in theory. I've given up relying on Spice where inductors and high frequencies are concerned, other than for the most basic of results.

Incidentally I recently discovered that 50V 1uF X7R caps when biassed near to their maximum voltage lose more in ESR than they do in capacitance. When biassed up the capacitance is about half the nominal value but the ESR goes down by a factor of 4. The 1206 1uF shows a highly impressive 3mohm ESR on Kemet's capacitor simulation software. I plan to try a few in parallel on my next chipamp build.
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Old 20th September 2012, 06:15 AM   #1275
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Quote:
Originally Posted by danielwritesbac View Post
Here's one simplified without the diodes (attached).
This one doesn't have "experimental" status, except that it needs the RF filters added.
There's no reason I know of to take out the diode on the positive rails - no chance of blowing it up there I'm working on a TDA7293 design at the moment and I'm going to run the positive driver pin (pin7) on a boosted, linear regulated supply. I suspect (though have no evidence) that positive PSRR is going to be better than negative so I'm borrowing a leaf from Klaus (KSTR)'s book here in referencing signals to the -ve rail. It would be cool if STM published such specs as National do on the LM3886 - that part's positive PSRR is very impressive.
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Old 20th September 2012, 06:15 AM   #1276
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Originally Posted by gootee View Post
So the best way to think of it might be "resonant dips" and "impedance peaks". But even Henry W. Ott alternates between calling the peaks "impedance spikes", "resonant peaks", "resonant spikes", and "anti-resonance spikes".
At least I'm in good company ... . That said, using "impedance peaks" may help reduce confusion out there, so I shall aim to consistently use that term forthwith. But, the effect is still due to a resonance behaviour, between the L and C characteristics of separate parts, in the "anti-resonance spikes". If there were no L in the picture then these spikes would not occur, no matter what C values were in parallel; resonance is both a low and a high impedance behaviour

Quote:
And where decoupling needs to cover a wider range of frequencies, sometimes people attempt to choose multiple values of parallel caps so that their resonances are spread out over the needed frequency range. Problems are usually part of the result, because the multiple capacitors interact to cause high-impedance peaks in between the resonant dips, where high impedances are not wanted.

The resonance dips are usually "a good thing", in a decoupling or bypassing context. They "swallow" problem frequencies, optimally, if located there. They produce current transients optimally upon demand at frequencies where they are needed, if located there.

The impedance peaks (the "anti-resonance" points produced by interactions among multiple C values in LCL networks) are usually "a bad thing". If they are, say, 25 dB-high peaks, then noise and whatever else is around will be 25 dB higher in level, at those frequencies. And if current is needed at those frequencies, the response is very poor. And if an amplifier's high-frequency power rail feedback has content at an impedance-peak frequency, the amplifier would be likely to oscillate at that frequency.

There is usually not much of a problem if the paralleled capacitor values are within a 2-to-1 ratio, because then the spikes usually fall within the dips, greatly reducing their magnitudes. The severe problems occur mainly when the capacitor values differ by an order of magnitude or more, such as when paralleling small-value film caps and large-value electrolytics.
This is where I part ways with you, Tom, sorry. You'll have to show me with LTspice, say, where paralleling an electro and a film gets you into trouble. Note the thread, Mundorf M-Cap Supreme as bypass cap? where I talk at length about this stuff ...

Frank

Last edited by fas42; 20th September 2012 at 06:21 AM.
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Old 20th September 2012, 06:24 AM   #1277
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Quote:
Originally Posted by seppstefano View Post
Frank,
many thanks for sharing your findings.

Stefano
Quote:
Originally Posted by fas42
No, any electrolytic or solid polymer, OS-CON and the like, will always be safe, even when paralleled with a film cap. Tom doesn't quite agree with me on this, but I suspect the bad behaviours he's come across are because of film caps at a distance from each other, i.e. the lead inductance between the caps comes into play.

Always remember that ESR is not a locked in characteristic, it varies all over the place depending upon just about everything, so don't get hung up on precise values ...

Frank
Frank,

I am only one of many who disagrees. <grin>

This should be required reading:

paralleling film caps with electrolytic caps

It can only cause problems, if PSU reservoir caps are paralleled with small film (or other types of) caps:

1. At worst, and guaranteed usually, it will create impedance peaks (aka "resonance peaks") that could greatly increase the amplitude of high-frequency noise and harmonics.

2. At best, it will acheive nothing.

The function of the caps, there, is to release current when the load demands it. Any high-frequency or fast rise-time currents that the load needs can't be provided effectively by a film cap located by the PSU reservoir caps, because of the inductances of the power and ground rails.

Any small caps belong within a millimeter or two of each active load's power rail connection, where they might actually be able to do some good.

Cheers,

Tom
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Old 20th September 2012, 06:31 AM   #1278
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Huuhh? Desired impedance is zero, at all frequencies, simple as that.
Simple, perhaps, but how practical is it?
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Old 20th September 2012, 06:39 AM   #1279
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Quote:
Originally Posted by gootee View Post
Frank,

I am only one of many who disagrees. <grin>

This should be required reading:

paralleling film caps with electrolytic caps

It can only cause problems, if PSU reservoir caps are paralleled with small film (or other types of) caps:

1. At worst, and guaranteed usually, it will create impedance peaks (aka "resonance peaks") that could greatly increase the amplitude of high-frequency noise and harmonics.
OK, round 2, ...

Electro's have low Q because of their very nature, their construction. That is, if you look at a curve of impedance with frequency for such it will alway look like the bottom of a bathtub, which means low Q: high ESR for the value of C and L of the unit. And that relatively high ESR will always damp any resonance with respect to any adjacent capacitor, film or electro.

But 2 high Q cap's next to each other, film say, is asking for trouble, if you get the values wrong, because the ESR of either is insufficient to damp the resonance between them.

Quote:
2. At best, it will acheive nothing.

The function of the caps, there, is to release current when the load demands it. Any high-frequency or fast rise-time currents that the load needs can't be provided effectively by a film cap located by the PSU reservoir caps, because of the inductances of the power and ground rails.

Any small caps belong within a millimeter or two of each active load's power rail connection, where they might actually be able to do some good.
Yes, the bypassing needs to be where the transient current is required, within millimetres of the part, for the real benefit to be felt.

The confusion is in part where you think the power supply smoothing caps should be: in my world they should also be within a tiny distance of where the current actually does its work, not on the other side of the amp, because it's convenient to have them there, or it looks nice ...

Frank
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Old 20th September 2012, 06:47 AM   #1280
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Originally Posted by sofaspud View Post
Simple, perhaps, but how practical is it?
Of course not possible, I was just quibbling with the term, "desired impedance" - this should just be as small as possible, or else do the design and simulation work to find out how much you get away with it not being "perfect", i.e., zero ...

Frank
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