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Old 8th September 2012, 08:00 PM   #1041
AP2 is offline AP2  Italy
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Quote:
Originally Posted by gootee View Post
AP2,

I have been running around doing unrelated tasking, so far today. So I haven't had time to study anything here on diyaudo, yet. (And my previous posts today were from my iphone.) I think that the only part that I don't understand is where and what the burst is. What causes it? Is it a current that the load is trying to draw? Or is it coming into the primary of the transformer as interference on the AC Mains? Or... what?

Tom
you have connected an amplifier as load in your model? (in this case is very simple)

To observe the behavior of a psu, you must connect a load of course.
This load can be fixed as resistive or interrupted as a pulse train.
depends on what you want to see.
a simple burst can be a signal eg.1 Khz that is cut off for 66ms and repeated (duration) for 33ms then call 33/66ms.
in the case of the psu, can also be used a mosfet which closes a resistance creating the load. the gate can be driven by a square wave.
-------
I asked you to see these signals in order to understand the behavior of your psu, when to supply an amplifier, if they fixed some problems that are not only the ripple.

Last edited by AP2; 8th September 2012 at 08:13 PM.
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Old 8th September 2012, 08:10 PM   #1042
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Despite being quite confused some of the time and not being able to read all of the content, I've learned a few things.

A slightly undersize transformer dramatically increases the needed tank/reservoir capacitance. Thanks Tom!

Capacitance located more effectively is more effective capacitance. Thanks Nico and Terry!

P.S.
It seems that those gems can really reduce capacitor expense.
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Old 8th September 2012, 08:47 PM   #1043
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Originally Posted by DF96 View Post
The smallest difference between rail voltage minimum and output peak maximum depends on the details of the output stage, and may vary slightly with the load resistance. In the case of your simulated output there are three Vbe drops, but also drops across the resistors - which will depend on BJT current gain. In some cases the resistors will have their value divided by the current gain, rather than setting a fixed voltage drop.

As you mention, even after gross clipping has been eliminated there may still be some 'ghost' of the ripple imprinted on the signal. That is down to the PSRR of the output stage, which it ought to be possible to estimate (even if only crudely), but it will depend on output stage architecture so no general rule of thumb will be possible. Fortunately NFB will help with this.
DF,

That all sounds like it could be correct.

But still, in order to allow a particular current to flow from a rail to a load and induce an accurate voltage across the load that depends only on a known fixed gain and the input amplitude, every type of amplifier would have to look like exactly the same impedance between rail and load, for a particular gain and input amplitude, no? And for a particular rail voltage and load impedance and any particular commanded output amplitude across the load, only one impedance between the rail and the load would be correct, no?

If I am correct, then it seems like we should be able to find something that is independent of the amplifier details.

Or am I thinking completely wrongly about that? (It happens.)

I was thinkng that maybe the 3.3 Volt figure was mostly related to capacitor ESR, and possibly also other parasitics. I have also not yet varied the ESR, except with changes in capacitor value.

Tom

Last edited by gootee; 8th September 2012 at 08:58 PM.
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Old 8th September 2012, 09:05 PM   #1044
gootee is offline gootee  United States
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Quote:
Originally Posted by danielwritesbac View Post
Despite being quite confused some of the time and not being able to read all of the content, I've learned a few things.

A slightly undersize transformer dramatically increases the needed tank/reservoir capacitance. Thanks Tom!

Capacitance located more effectively is more effective capacitance. Thanks Nico and Terry!

P.S.
It seems that those gems can really reduce capacitor expense.
Yes, Daniel. I was amazed at how much difference it made. It seems obvious, NOW, of course. Also, make sure that there is enough headroom in both the Vrms and the VA ratings. Otherwise, the changes you hear when changing caps, especially when changing their values, might be mostly due to the transformer size rather than the caps themselves.

It complicates everything, and ESPECIALLY some of the "findings" of the subjectivists , and will continue to do so unless we can say something like "as long as the transformer has high-enough VA and Vrms ratings", and we can test everything with a way-oversized transformer, if it might matter.

Tom
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Old 8th September 2012, 09:26 PM   #1045
DF96 is offline DF96  England
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Quote:
Originally Posted by gootee
But still, in order to allow a particular current to flow from a rail to a load and induce an accurate voltage across the load that depends only on a known fixed gain and the input amplitude, every type of amplifier would have to look like exactly the same impedance between rail and load, for a particular gain and input amplitude, no? And for a particular rail voltage and load impedance and any particular commanded output amplitude across the load, only one impedance between the rail and the load would be correct, no?
If I understand you correctly, then no. You may be confusing DC resistance (V/I) with AC resistance (dV/dI). In fact, the concept of resistance is not very useful here. To get a particular current and particular voltage across two points can mean any combination between a voltage source (zero resistance) and a current source (infinite resistance).

The 3.3V figure you have found probably has little to do with capacitor ESR. Vbe drops in the output stage account for much of it. Then there is voltage drop across driver resistors (e.g. the 22 ohm).
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Old 8th September 2012, 10:04 PM   #1046
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Tom & DF,

Isnt it great that all this detailed work has, once needless parasitics (by which I mean that the parasitics can be avoided at the design/layout/wiring stages by following the good engineering practices highlighted in this thread) have been eliminated (at little or no cost) we end up back at the fundamental - mayhap simplistic - approach given in many textbooks.

but the real magic of this thread, as Daniel alludes to, is the "topological dual" of the above statement: If one does not explicitly eliminate these parasitics then the simplistic approach doesnt really work.

Adding more caps doesnt really fix the ESL/ESR voltage ripple (and wiring/layout may make it worse) - eg doubling the capacitance wont halve the actual supply ripple, which leads directly to stupidly large amounts of capacitance.

And although I personally feel subjective tests are anathema, I cannot help but conclude there really is something to it. Many (most?) amps have such poor (from an RF perspective) wiring and layout (IOW poor control of magnetic and to a lesser extent electric fields) that almost any change will affect them in some way.

which is exactly like EMI testing. EMI problems are seldom due to "one thing", they are invariably due to dozens if not hundreds of little antennas. which means that fixing any individual issue has little effect, and measured results seem to change as a function of time, temperature and sock colour. thats the true cause of male pattern baldness in engineers

And just like EMI fixes, the first approach should be to eliminate as many of the bad practices as possible before re-testing (EMI tests are expensive). And once one understands the basic principles (current flows in loops - minimise them, and Thou Shalt Control Thy Fields) you can find them by inspection rather than measurement (hard & $$) or, worse yet, analysis. unless one has full 3-D field solvers, which is how the big boys get stuff right first time, analytically accounting for a myriad of parasitics is useful for little more than writing papers.
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Old 8th September 2012, 10:24 PM   #1047
gootee is offline gootee  United States
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Quote:
Originally Posted by DF96 View Post
If I understand you correctly, then no. You may be confusing DC resistance (V/I) with AC resistance (dV/dI). In fact, the concept of resistance is not very useful here. To get a particular current and particular voltage across two points can mean any combination between a voltage source (zero resistance) and a current source (infinite resistance).

The 3.3V figure you have found probably has little to do with capacitor ESR. Vbe drops in the output stage account for much of it. Then there is voltage drop across driver resistors (e.g. the 22 ohm).
Hey, DF, this particular type of case isn't that complicated.

Anyway, my post used the term impedance throughout, not resistance, except in the comment about ESR.

I was only talking about the complex impedance at any one instant.

What was being considered at the moment is a driven load that is a fixed ideal resistance, with a power rail voltage that is varying, but at any instant it is what it is and the input says that the load is supposed to have a particular voltage across it and so the amplifier, at any instant, "must" (try to) set its overall impedance (between rail and load resistor) so that Iload * Rload = the commanded output voltage across the pure resistance. I can worry about real speaker and crossover loads later, maybe, but the solution for this seems more-trivial. (nd our source is, we like to hope, very low impedance.)

Tom


This might be useful: The voltge across the amplifier, from the V+ rail to the high side of the load, when the load is 8 Ohms with 100 Watts RMS across it from that rail's share of a square wave, is about 16.85 Volts, average, with a ripple amplitude of about 2.1 Volts.
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Old 9th September 2012, 12:58 AM   #1048
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Quote:
Originally Posted by DF96 View Post
As you mention, even after gross clipping has been eliminated there may still be some 'ghost' of the ripple imprinted on the signal. That is down to the PSRR of the output stage, which it ought to be possible to estimate (even if only crudely), but it will depend on output stage architecture so no general rule of thumb will be possible. Fortunately NFB will help with this.
That is the real elephant in the room of this whole exercise, and it's more than the output stage if the input circuitry is fed from the same supplies. And provided a reasonably accurate sim of the amp circuitry is available then it is extremely easy to measure the PSRR, over the whole range of frequencies where it's potentially capable of being subjected to such "noise". I've already tested the PSRR of the output circuitry, and it's pretty good, about 80dB down over most of the spectrum. But, it starts to degrade at the higher end, just where you need it to be working at its best, for FB to function correctly, etc!

And then there's the full amp, by Bob Cordell, to be considered: its PSRR is much worse. And to really get the fur flying, at least one other amp circuit being discussed on diyAudio extensively has very poor PSRR, at least going by the sim ...

Frank
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Old 9th September 2012, 03:12 AM   #1049
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That may be why many good designs had a separate supply for the voltage gain stages, Electrocompaniet, Hafler XL, GAS Son, APT, to name a few.

The amp I mentioned above as designing that only had 3m3F had a regulated supply for the front end.

I really think that makes a big difference, more so than the bulk capacitance in the output stage (which is still suitably bypassed).
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Old 9th September 2012, 04:39 AM   #1050
gootee is offline gootee  United States
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Quote:
Originally Posted by DF96
If I understand you correctly, then no. You may be confusing DC resistance (V/I) with AC resistance (dV/dI). In fact, the concept of resistance is not very useful here. To get a particular current and particular voltage across two points can mean any combination between a voltage source (zero resistance) and a current source (infinite resistance).

The 3.3V figure you have found probably has little to do with capacitor ESR. Vbe drops in the output stage account for much of it. Then there is voltage drop across driver resistors (e.g. the 22 ohm).

Quote:
Originally Posted by gootee View Post
Hey, DF, this particular type of case isn't that complicated.

Anyway, my post used the term impedance throughout, not resistance, except in the comment about ESR.

I was only talking about the complex impedance at any one instant.

What was being considered at the moment is a driven load that is a fixed ideal resistance, with a power rail voltage that is varying, but at any instant it is what it is and the input says that the load is supposed to have a particular voltage across it and so the amplifier, at any instant, "must" (try to) set its overall impedance (between rail and load resistor) so that Iload * Rload = the commanded output voltage across the pure resistance. I can worry about real speaker and crossover loads later, maybe, but the solution for this seems more-trivial. (nd our source is, we like to hope, very low impedance.)

Tom


This might be useful: The voltge across the amplifier, from the V+ rail to the high side of the load, when the load is 8 Ohms with 100 Watts RMS across it from that rail's share of a square wave, is about 16.85 Volts, average, with a ripple amplitude of about 2.1 Volts.
Well, one great thing about Spice is it's easy to just measure things right off of the schematic, after a simulation has completed. (The numbers I gave after my name, in my last post, were the wrong ones, by the way. They were for an unrelated input waveform. See below for some relevant ones.)

First I ran a sim with a reservoir capacitance that was too low. Then I plotted the voltage across the amplifier terminals (V+ to the high side of the load) divided by the rail current, to give a plot of the amplifier's impedance. I also plotted many of the rest of the voltages and currents associated with the positive rail and the load.

When the positive part of a square wave comes up to 40 Volts, 5 amps start to flow through the 8 Ohm load resistor. As the reservoir cap discharges, the positive rail ramps downward, lowering the voltage across the amplifier by the same amount. The amplifier's impedance plot has exactly the same shape as the V+ rail voltage plot, because the amplifier has to ramp its impedance down with exactly the same profile, at the same time, in order to keep the load current the same.

If the reservoir capacitance is too small and the output waveform stays at high power for a long-enough time relative to the time between charging pulses, then the V+ rail can ramp downward until it's too close to the 40-Volt level of the square wave voltage across the load, which is the "bottom" reference voltage for the voltage across the amplifier leg that is between the V+ rail and the load resistor.

At some point, the amplifier either cannot lower its impedance any farther or cannot lower its voltage any farther, and the current in the load resistor cannot be maintained and it starts to fall, causing its voltage to also start downward. This typically only happens at the lowest rail voltage (a ripple voltage "trough"), which is also where the charging pulses occur, which is fortunate, because for marginal capacitances the signal waveform can recover quickly when the charging pulse occurs.

The main leg of the amplifier, between the V+ rail and the high side of the load, is the CE of an mjl21194C (Cordell's model) in series with a 0.22-Ohm resistor.

In the case I simulated, the impedance between the V+ rail and the high side of the load could not go below about 627 mOhms (i.e. about 407 mOhms for just the transistor) and the Vce voltage of the mjl21194C could not go below about 1.95 Volts (or 3.003 Volts if the 0.22 Ohm resistor voltage is also included).

So the 3.003 Volts across the amplifier looks like it is the voltage responsible for the difference voltage that I was using as a marker, before, to find the point when the gross distortion would stop as the C value was increased.
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