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Old 28th May 2012, 05:40 PM   #1
sildex is offline sildex  Romania
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Default SMPS topologies.

Hello,

I want to open a topic with my latest research findings regarding trafo designs for DIY SMPS. This info is took from friends, internet so maybe nothing new but I think could be persons not familiar with all these aspects.

I would like to begin with smps topologies, as far as I read there are 2 main classes for SMPS: feed forward converters and push pull converters.

Feed Forward converteres have the advantage of using less switching elements, cheaper elements: ex. replacing 1 transistor with a diode or 2 transistors from the full bridge with 2 diodes. But the big disadvantage is they use the B in only one direction having higher chances of saturating the core. You can see in attached document. Due to this you have not only the disadvantage of using the trafo at half of the maximum power also you can add the Br with is the magnetic remanence which lower even more to ~40% of the maximum power.
Click the image to open in full size.

Push Pull Converters like half bridge, full bridge, 2 transistor push-pull. Those converters have the advantage of using the core to maximum power using the maximum B swing from - to + B. Because the current is circulating in 2 directions having less chances of saturating the core. But the disadvantages could be using boostrap drivers like IRS21xxx having some charge-pump to drive the highside or GDT transformers so more elements needed.

Click the image to open in full size.

For design equations I use pretty simple formulas likethey can be adapted depending on each topology like Vin/2 or stuff like this)

Minimum nr or turns per primary winding:
(imporntant here is Bs = ~Bs - Br for feed forward topology and Bs = 2xBs for push pull)

Click the image to open in full size.
T = “ON” switch time

Nr of turns per secondary winding:

Click the image to open in full size.

Core maximum power transfer.

Click the image to open in full size.

“This formula is based on current density of 420A/cm2 in the windings, and assumes a window
utilization of 40% copper. At low frequencies, the flux swing is limited by saturation, but above 50kHz (ferrite), ∆B is usually limited by core losses. Use the ∆B value that results in a core loss of 100mW/cm 3 (2times the “flux density” given in the core losscurves).”

Capacitors estimations

DC blocking cap calculations:

Click the image to open in full size.


Input capacitor:

Click the image to open in full size.

Primary peak current and rms current:

Click the image to open in full size.

All formulas from above are implemented successfully in the software "ExcellentIT-En(4000)" and on Halbbrucken the german online calculator. I've try them and obtained similar results.



With this in mind you must start building the transformer. Better to separate the primary and secondary with PVC shild tape, if you need 2 primary windings for push pull and supply to 325Vdc you might use the method of using 2 wires in parallel but not sure if the wire isolation laquer will stand up to 650V what do you think?
Another think you must choose your transistors for the converter and to be capable to withstand the input currents, and the breakdown voltage should be high enough not to punchthrough the transistor jonction.
Better to mount transistors on heatsinks and monitor the temperature when testing.
Put snubbers only if necessary, this you can check with an oscilloscope. For example check the Vds on Low side transistor. This you can do safe without any galvanic isolation for the oscilloscope.

Testing. Here I had an interesting idea. To test backwards is more convinient due to small voltage on secondary and less danger, not to pop-up the MOS like popcorn. So you must reverse the primary and secondary and connect on your half, full bridge what ever topology you have... use the frequency as in calculation above and increase the voltage slowly monitoring the current shape with an oscilloscope would be better on primary if the current is going liniar then is ok if the slope is changing going steeper then this is a sign of saturation and you must avoid that area by increasing frequency or modify the nr of turns or lowering the Vin voltage(usually this you cannot do). Please correct me if I'm wrong.
Also I saw the primary inductance saturation phenomen is not influenced by the secondary's load. So why not testing at the beggining without load to check where the saturation ocours and to recalibrate your calculations and evreything. For more details like pictures nr of turns evreything on this I will come up with another post.

Special thanks to Mihai (Mgm2000).

Much of the info was took from:
http://www.lodestonepacific.com/dist...tion_Notes.pdf
http://www.ti.com/lit/ml/slup126/slup126.pdf
http://www.ti.com/lit/ml/slup083/slup083.pdf

I will continue with 2 more topics like: Testing trafo backwards and Full bridge converter functionality -> an aspect of energy circulation between primary winding and Vin capacitor.
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Old 28th May 2012, 06:01 PM   #2
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Push pull topology is strongly not recommended. In place of it, use half bridge. Or, a current fed push pull like this:

http://bhagirathi.iitr.ac.in/dspace/...2/1/DCC003.pdf

Good luck.
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Old 28th May 2012, 06:37 PM   #3
RJM1 is offline RJM1  United States
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What about SEPIC converters? Single-ended primary-inductor converter - Wikipedia, the free encyclopedia
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Old 28th May 2012, 06:40 PM   #4
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Quote:
Originally Posted by RJM1 View Post
It´s a good choice if he doesn´t need isolation.
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Old 29th May 2012, 07:16 AM   #5
sildex is offline sildex  Romania
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Thank you for your reply, I want to build a SMPS for a power 20W LED, with galvanic isolation and to make current feedback using a shunt resistor.
I've tried halfbridge 2 capacitors and 2 transistors so far with success and now I want to build a push-pull with 2 transistors only.
I want to try in this post to add all info you need to build a transformer like a merge between application notes and some experiments to check the math behind.
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Old 29th May 2012, 01:23 PM   #6
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For 20W the best choice is Fly Back, few components, and a FET and UC384x No doubt.
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Old 29th May 2012, 01:33 PM   #7
sildex is offline sildex  Romania
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Flyback is generating very high snapback voltage like 4-6Vin. Some you can clamp with snubbers some not so you need 900V MOS. And special cores like airgap cores. 500V mos or 600V you can find at lower prices or recovered from other old SMPS. And you are using half of the core power.
Flyback is not so good.
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Old 29th May 2012, 01:40 PM   #8
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Ja ja ja, told that to the manufacturers of cell phone chargers!!! All of I know uses Fly Back...

900V for what. With a 600V 2 amp is sufficient.
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Last edited by Osvaldo de Banfield; 29th May 2012 at 01:43 PM.
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