Super Regulator, collecting the facts

[dimitri]

I could not get why are you all mill the wind with ESR.
We need a zero in loop gain, and we get it either by finite ESR or by other means.

From AN-1148: "National Semiconductor does have LDO regulators like the LP2985 and LP2989 which are specifically designed to work with extremely low ESR capacitors like surface-mount ceramics. This type of capacitor can have ESR values as low
as 5-10 m, which will cause most typical LDO regulators to oscillate.
To make the LP2985 stable with such low ESR values, an internal zero is built in which takes the place of the ESR zero previously provided by the Tantalum output capacitor. The effect of this is to shift the stable ESR range downward. A typical LDO with no added internal zero might be stable ESR range from about 100 m to 5 (well suited for Tantalums but not ceramics). The stable range for the LP2985 extends down to 3 m, and has an upper limit of about 500 m so it can be used with ceramics."

[andy_c]

The app note references being quoted seem to all apply to the monolithic low dropout regulator, where the pass transistor is operated in common emitter mode and is a lateral PNP for the positive regulator case. This is really a somewhat different problem than the super reg topology. For the low dropout case, the open loop output impedance without the load capacitor is on the order of tens of kOhms, while for the super reg topology the open loop output impedance without the capacitor is on the order of tenths of an Ohm. Also the low dropout regs have a second pole at a few hundred kHz due to the lateral PNP, while the super reg uses a pass transistor deliberately chosen for high ft, avoiding this issue. The analysis of the low dropout regulators seems to neglect the series inductance of the load capacitor as well. The OnSemi app note quoted earlier shows in figure 5 a unity loop gain frequency of 100 kHz or so. We're looking at numbers more like 1-10 MHz for the super reg topology. So whille many similar considerations apply between the two topologies with respect to the load capacitor, it would be a mistake, I think, to make a blanket assumption that what works well for one will automatically work well for the other. We have a factor of 10-100 difference in bandwidth between low dropout and super reg to consider, for one.

[janneman]

Originally posted by millwood
Jan, you couldn't have been more wrong in your impression of my position on ESR. You are advised to read earlier posts of mine where I clearly stated my position.
[snip]
Not to mention a certain statement made earlier by someone with regards to the number of application notes on low ESR caps is not supported by National.

If I mis-represented you, I apologize. I admit that I most of the times don't re-read the whole thread. Sometimes your posts are really cryptic. Like the 2nd part of the quote above. What the hell does that mean???

Jan Didden

[jewilson]

Fred,

I looked at the spec's on the Sayno OS-CON cap's, look's good. I'll have to try some and compair the performance to the Sprague 550D and the Mallory THF caps.

http://www.secc.co.jp/english/index.html

[dimitri]

>it would be a mistake, I think, to make a blanket assumption that what works well for one will automatically work well for the other
both, LDO reg and super reg, have three poles
dominant pole associated with error amp
power pole associated with the power transistor and drive circuitry,
load pole associated with Rout and Cload

>while the super reg uses a pass transistor deliberately chosen for high ft, avoiding this issue
it will be in the range 1-10 MHz

>while for the super reg topology the open loop output impedance without the capacitor is on the order of tenths of an Ohm
0.1 Ohm and 10 uF = 160 kHz

[jewilson]

Andy,

After getting the DAC up and running, it has six super regulators I found the issues with the AD797.

1. The regulator did not oscillate with out a load.

2. With the load 3 out of the 6 regulators oscillated. Sockets are great. The oscillation was somewhere around 10Mhz and about 60 mv, ouch riding on the DC.

The cap I used are dipped run of the mill tantalums not the low ESR flavor.

3. As the data sheet states the AD797 the phase will approach drop passes 0 degrees phase margin at gain of less than about 18. It interesting that half the AD797 did not oscillate.

So dropped in some AD825’s and some OP27’s to see how they did, of neither one broke into oscillation.

[andy_c]

Originally posted by jewilson
Andy,

After getting the DAC up and running, it has six super regulators I found the issues with the AD797.(...)

Having a 100 MHz gain-bandwidth product in the op-amp is a tough one! I think the ~30 MHz GBP of the AD825 is more reasonable. I'm doing this from memory, but I seem to recall that the phase characteristics of the AD825 were very civilized at high frequencies. In my sims of a high-voltage incarnation of the super reg, the AD825 had the best transient performance of anything I tried. I wanted to get max line rejection of 120 Hz, so I ended up with an OP-37 with the feedback loop AC gain set to 5. Transient response wasn't as good as the AD825 but the line rejection at 120 Hz was 40 dB better than the AD825 due to the increased low-frequency loop gain.

Good luck with the project!

[peranders]

I have added some "slow down" parts at the AD797, seems like a good thing.

[Nicke]

Originally posted by peranders
I have added some "slow down" parts at the AD797, seems like a good thing.

Why not use the AD825 or AD817 as Walt suggested in the articles.I use the AD817 and have no problems with it.
Another good thing is that you will save some cash if you use AD825


Nicke

[peranders]

I'm going to start with AD797 and my additional parts are just in case and I expect that you can choose any other suitable opamp. My output transistor is rather fast also. Maybe this is a good thing when it comes to stability.