+/-30vDC @ 10A PSU
I need a regulated Symetrical PSU capable of holding 30V DC (+/-) under an audio load of 150W.
I'm thinking a simple Darlington-amplified Zenner arrangement. Has anybody here ever used AC by-pass capacitors in such a heavy-duty design? Would a symetrical op-amp tracking-PSU be worth the extra effort?
This is what it will be powering.
What do you hope to accomplish with useing a Regulated PSU for a power amp ??
The PSSR of a chipamp is pretty good so regulating will show minimal benefit .....
You could probably use LM317 regulators with a pass transistor useing a few high power transistors in paralell ...... The Datasheet has a schematic for a 5A regulated PSU useing one pass transistor but I"m sure it could be upsized for 10A with bigger/more transistors.....
I designed and built a long-tail pair input A/B power amp a few years ago which really benefited from a quieter supply, but here I'm more interested in maximising dynamic range (running the chips at max Vss) and being able to rock-it sometimes (maintaining max Vss under load).
I want to take the variation of regulation out of the argument with the Tx.
(plus my alternative to current Tx [20/0/20] is higher voltage [35/0/35])
I had great results from by-passing the regulator cct with a by-pass cap the size of the smoothing caps in the HT side (60vDC+/-) connected between those and the smoothing caps on the LT (amplifier side) of the regulator.
Took my 50W/ch amp up to 92WRMS/ch at the same Vss=35v, psu also powered the pre-amp.
And the regulator TIP's ran COLD, even under the highest demands. The by-pass caps supplied all the current, the TIP's just set the voltage.
Anyone know what I'm talking about?
Do you mean decoupling caps across each output stage devices' power connections, to supply the transient currents?
You can calculate the required value if you know the worst-case load impedance, the max slew rate (or highest frequency), and the desired max rail voltage disturbance.
Look at posts 221 and 224, and also 252, 310-314, and 319, at:
Say your amp's max slew rate is 15 V/us and the power rails are +/-30V and the load is 4 Ohms.
So an output device's output could theoretically slew from 0 to 30 V in 2 us, which would equate to 0 to 7.5 Amps in 2 us.
The capacitor equation is i = C dv/dt.
Rearranging (and ballparking everything as "increments"):
C = ipeak delta t / delta v
C = 7.5 (2 us) / delta v
If you want the voltage rail to only dip by 0.1 V max, then C = 150 uF or more.
But there will probably be a problem with the inductance of the connections:
V = L di/dt
L = Vpeak dt/di = 0.1 (2us)/7.5A = 27 nH maximum. Ouch. That's probably somewhat less than two inches of conductor, round trip, including the lead-spacing of the cap.
So you'll probably want to consider using multiple smaller caps in parallel, since that would lower the total inductance, much like the total resistance of parallel resistors is lower than any of the individual resistances. But for that to work with inductances, there can't be any mutual inductance. So they would each have to have separate conductors, all the way to the points across which you're decoupling.
Alternatively, you can use dv and di to calculate a target impedance that needs to be seen by the power device's rail connections, Zt = delta v / delta i, up to some frequency, and get another set of constraints (C and L) starting from there. That's covered in the third post mentioned above at the link, if I recall correctly.
That's EXACTLY what I was needing.
I didn't know that it could work with capacitances TWO ORDERS OF MAGNITUDE lower than those I was experimenting with a few (20!) years ago.
I got an odd effect back then. It increased 2nd order harmonics slightly...
Will I get that effect here?
Was it related to the deco-caps being so over-value?
Or will slew-rate / transients be supplied by the reasonably generous on-board supply caps?
What about Bass performance? Is there a lower frequency limit?
Wait, doesn't the output TIP take over Iss from the deco-cap on the way down to DC? I suppose the frequency depends on the impedance of the output TIP.
Blimey, this is like designing a speaker x-over again.
The thing falls apart after it hits a 6v RMS waveform.
My proposal schematic is to come; I'll do it right now.
This will be what I meant about the double power jump from 50 w to 92WRMS on the same Vss on the same pcb; just because of the power regulator with the (huge - 4,700uF) regulator bypass caps, +ve connected to +ve 60v, 6,800uF, -ve connected to +ve 35v, 10,000uf on the plus side, reversed for the negative supply.
I'm a drawin', Lassie, och I'm a drawin'!
Not sure about the second-order harmonic problem.
As far as the on-board supply caps, they should help somewhat (especially with steady-state tones) but the main point, after calculating the minimum value of the required capacitance, is that the decoupling caps have to be CLOSE to the pins of the device (output transistor, chipamp, etc).
It's mainly a problem of the inductance of the supply and ground rails and the cap leads and the caps themselves (or at least the equivalent of their lead spacing in conductor length). You can usually estimate it to be at least 15 nH per inch of conductor. The inductance could make it impossible to get the current to the device fast-enough, for the fastest transients, and also, because of the inductance, any attempt to draw a fast transient current will cause a large disturbance in the rail voltage, since V = L di/dt, where di/dt is the time-rate-of-change of the current. Note that the amplitude of the current doesn't even matter, there. A large voltage will result if the amount of current changes rapidly, regardless of the actual amplitude of the current.
To keep the impedance seen by the device's power pins low-enough, especially at higher frequencies, you would ideally want ZERO trace length or wire length between the decoupling caps and the point of load (which gets difficult with larger capacitors!). And, in "higher frequencies", we include any transient (e.g. leading or trailing edge, attack/decay), regardless of the actual frequency of whatever is starting or stopping.
We can actually get a frequency equivalent of a rise time:
f = 1 / ( π ∙ trise)
according to Henry W. Ott's EMC book.
Most power amplifier output devices' power pins will need to see a low impedance out to a minimum of somewhere between 150 kHz to 300 kHz. And many will need it to quite a lot higher than that. That's just based on a few for which I have tried the calculations at the link I gave.
Anyway, it's probably always better to use multiple smaller paralleled caps, if possible, instead of one big one, especially if their connections can be separate and paralleled all or most of the way to the point of load, to give the lowest total inductance (and the lowest total impedance).
One end result of all of this should be that everything arrives at the output with better time-alignment, which should help to preserve at least the soundstage image, and the accuracy and clarity of anything with a sharp or large edge. And then there are the seemingly-obvious effects of having enough current available, exactly when it's needed. And there's the fact that the output device won't have to try to get the needed current through the inductances of the power/ground rails, which would cause relatively-large disturbances in the rail voltages.
I still haven't done any hardware tests to see if the effects are noticeable, or how noticeable they might be, although simulations imply that they would be. But it seems unwise to not at least try to use the proper size and positioning for the decoupling caps, given what the math tells us.
By the way, since the resulting capacitance value is a minimum, and there might be other needs that weren't taken into account by the transient-centric analysis, I would tend to want to use the largest capacitance that would fit, while still keeping the inductance (mainly the connection lengths) at or below the maximum inductance that is also calculated. Actually, I'd probably put 1X or 2X the minimum cap value as close as possible and then some larger capacitance as close as possible after that, etc. I don't think it is possible to have too much, as long as you also have some fairly-small ones really near the pins, to satisy the fastest transients' needs.
ALSO, remember that the cap value you calculate depends on your choice of the maximum allowable/desirable rail-voltage disturbance. So going with larger caps will just make the rail-voltage disturbances smaller, and should (theoretically) just improve things, as long as the "max inductance/impedance and minimum capacitance constraints as seen by the pins" are also met. It usually just comes down to limitations in the space available for the caps, especially if the layout was not designed with the decoupling caps in mind, per the posts at the link I gave.
Oh, I should mention that I never really got to finish that whole analysis. And it looks like the risetime can make it call for even larger caps if it takes LONGER, which kind of makes sense. (But using the differential equations that way is only valid for very short time periods.) So probably the capacitance that's calculated really is a bare minimum, and only accounts for the highest-speed transients. But if that's the case, maybe we'll get lucky and anything slower can come through the rails' inductances OK. I'll see what I can figure out, though.
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