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Old 29th October 2011, 08:41 PM   #21
Join Date: Jun 2011
I see what you mean about using the primary side op-amp to get the extra pole-zero pair.....

...and I once did a schematic like that, but was criticised because they said i was using two error amplifiers (i.e. the TL431 and the primary side op-amp) in the feedback.

I am just thinking that it'd be easier to get a higher bandwidth by just using the artificially increased ESR.?

I know its crude but who won't dissipate much because its a high voltage low current output(s), [+/-50V, 2A6] and ripple current in the cap isn't that much......also its a supply for Class D guitar amp so it'll not be on max power for long anyway.

...also the extra switching ripple is going to be above the audio frequencies, so i wont even bother to filter it. any case , this smps is supplying a Class D amplifier for a guitar, so the Class D output filter will filter this switching ripple anyway.

Last edited by eem2am; 29th October 2011 at 08:49 PM.
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Old 29th October 2011, 11:03 PM   #22
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Join Date: Nov 2010
Location: The City, SanFrancisco

Just curious as to what bandwidth your aiming for?
If you don't mind me asking what was the criticism behind having 2 compensation stages?

One potential problem with the esr approach is ensuring the D-amp doesn't present enough capacitance to get the phase back near the cross-over.

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Old 29th October 2011, 11:16 PM   #23
Join Date: Jun 2011
Regarding bandwidth needed for this smps which supplies a Class D amplifier for guitar................
.....well, i am wanting as high as possible, but am thinking i'll settle for about 3KHz crossover.

Sorry i dont know what the "2 compensation stage" critisism was based around....i was just getting told that i was using two error amplifiers, one on secondary side , and one on primary side.......i don't know why they were critisising seemed ok to me.

Good point about the D amp having its own local capacitance which could take the ESR zero back up again.......

.....i suppose i would have to place a filter between the SMPS's output capacitance, and the Class D amps capacitor bank.......not a great solution but all i can think of at the moment.

..any ideas?
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Old 29th October 2011, 11:58 PM   #24
Join Date: Jun 2011
.....Regarding the problem of the Class D amplifier's capacitor bank adding to the Capacitance and moving the esr zero frequency higher.......

....i think i would just make sure that the local capacitance of the Class D amplifier was just a small amount of film capacitance......i.e. 22uF of film capacitance.

....the capacitance at the output of the smps is 940uF of electrolytic. (That is each of the dual rail outputs has 940uF)

I think this solves the problem.?

The local capacitance of the Class D amplifier just needs to be a small amount of low ESR (& low ESL) capacitance so it can respond to the switching edges of the Class D amplifier.?
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Old 30th October 2011, 12:37 AM   #25
Join Date: Jun 2011
...oh sorry, i forgot to say.

The Rail ripple at the switching frequency would be 1.4V peak-to-peak at the switching frequency (84KHz).

This seems a lot ...but do you agree that since its above the audio range, it won't matter?

Also, the Class D output filter will filter away this 84KHz ripple anyway.

(Its a full-bridge so this 1.4V peak-to-peak ripple is triangular wave.)
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Old 30th October 2011, 03:50 AM   #26
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Join Date: Nov 2010
Location: The City, SanFrancisco

Sorry its been many years since I designed SMPS (the TL431 was new then).
However its seems possible to me to get ~3Khz from a TL431 especially if you can use the PWM's op-amp as another compensation stage.
Even a 22uF cap is going to add significant phase near 3Khz.
I can envision problems with 84KHz ripple walking by the D-amp modulated switching.

Seems to me that the advice given by all others has been very sound.
But you best know your constraints and objectives.

Hope this helps a little
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Old 30th October 2011, 12:12 PM   #27
Join Date: Jun 2011
The 22uF would add significant phase but we would still be a lot less than the original 180 degree phase dip?

The 1.4V pkpk switching ripple at 84Khz is sitting on top of a +50V and -50V its less than 3% ripple.
-surely this won't produce any intermodulation distortion with the Class D amplifier?
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