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Old 20th February 2013, 06:08 AM   #2121
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Salas I have a scope
what Is the best - stay with 4.7 uF at regulator termination and to lower as possible ( 0.1 - 0.2 uF) dac decoupling caps value without series resistor and inspecting with scope or ?
what Is the correct procedure to use a scope for checking - scope switched to ac or dc and x100 ?
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Old 20th February 2013, 11:27 AM   #2122
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To look for ripple AC, if you set the probe x100 you don't look small ripple better if you set for x1 or x10
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Old 25th February 2013, 06:11 PM   #2123
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Default Maximum Vout on SSLV1.1

Apologies if this question has already been asked. I have the SSLV1.1 boards and the userís guide states that the maximum Vout is 45 volts. I would like to use the positive regulator at 50 volts out. What is the limiting factor and what would need to be changed on the positive regulator to operate it at 50v output?

Thanks in advance.
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Old 26th February 2013, 04:53 AM   #2124
Salas is offline Salas  Greece
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The leds tail jfet max. Its spec is 50V. To get 50 out you need at least 55 in and all it separates that from the jfet is 3-4 leds drop. You get the picture. Marginal. If you will not luck out on edge and it goes, replace it with a 10k 1W resistor standing upright. Less good a CCS but it will survive.
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Old 26th February 2013, 05:38 PM   #2125
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Hi Salas,
Thank you for that excellent explanation. Now I see the problem. 58v in minus the LED Vf 6.3v leaves 51.7v across the JFET. Would it be ok to add a small value resistor in series with the JFET Drain to bring the Vgds below 50v? Alternately would it be worthwhile to look for a JFET with a higher Vgds rating? Thank you for the 10k resistor solution as a backup.
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Old 26th February 2013, 05:47 PM   #2126
Salas is offline Salas  Greece
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Not easy to find any low noise and relatively low capacitance jfet at even higher Vds easily available. But if you do, watch the dissipation also. That will be its voltage across times IDSS. IDSS is controlled by the associate R108 resistor to can be moderated though. Don't get it lower than 3mA for the LEDS to work adequately. A small resistor in series with the drain would be a botch job and it will compromise it a bit but it can be a solution.
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Old 26th February 2013, 07:28 PM   #2127
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Botch job. Thatís my specialty.
If I locate a low noise JFET with Vgds > 50v I will post it here.
Thank you for your advice.
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Old 12th March 2013, 01:26 AM   #2128
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Default SSLV1.1 Oscillator!

Hi
I have completed two of your supplies. They are set to 15V and will supply my phono preamp. I bench tested them and they were stable at 15V with no remote sensing.

I then installed them into my preamp using 4 core cable for power and remote sensing. Unfortunately I now have approx 11.5V on each output and oscillation. The output/sense cables are 200mm long and the phono board has 0.1uF decoupling caps only. If I reconnect sense wires directly at the reg. I get my 15V back.

Do you have any guidelines for using remote sensing with these supplies? I guess there is too much phase shift on the sense input, and its upsetting the feedback loop. Any suggestions?

Thanks
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Old 12th March 2013, 02:42 AM   #2129
Salas is offline Salas  Greece
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I would try 3 experiments. 1. To delete the 0.1uF decouplers on the phono board if they aren't absolutely necessary to its design. 2. To install 100uF locally on the reg across the sense outputs. 3. To buffer the phono +V input with 10R resistors so to turn the capacitive decoupling to an RC filter.
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Old 12th March 2013, 08:55 AM   #2130
AndrewT is offline AndrewT  Scotland
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Try adding 100uF decoupling at the phono board, instead of removing decoupling.
By adding I mean 100uF + 100nF
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