I have designed what I hope to use as a 0-50V, 0-5A power supply. I use an ETD39 core with a 60 turn primary (about .14 Tesla flux density) and a CT 48 turn secondary for a step down ratio of 2.5. My drive topology is a half bridge fed from a doubler so the primary sees 170V or so at any given time. I use a UC3825 or similar controller and a MAX627 MOSFET driver. My design uses secondary side control electronics and uses voltage mode regulation to operate in either constant current or constant voltage mode depending on user setting and load conditions.
I have 2 major concerns I would like to discuss:
1. Is the mode of regulation I have designed likely to work? I take voltage and current measurements and scale them to be 0 to 2.5V for full range current and 0 to 2.5v for full range voltage. I then feed these scaled voltages into my inverting high gain amplifier stages. I have used Type II compensation in my schematic because it seems to be most popular.
Question: Will Type II compensation work in a design like mine where the output of the supply goes through a second order filter? I have read that each LC stage adds a 180 degree phase shift?? If this is correct then I bet I could potentially have a very unstable supply.
2. What kind of power dissipation is acceptable in an ETD39 core set? Does 3W max copper loss and 3W max core loss sound acceptable?
Any discussion and suggestions about my design would be greatly appreciated.
I have 2 major concerns I would like to discuss:
1. Is the mode of regulation I have designed likely to work? I take voltage and current measurements and scale them to be 0 to 2.5V for full range current and 0 to 2.5v for full range voltage. I then feed these scaled voltages into my inverting high gain amplifier stages. I have used Type II compensation in my schematic because it seems to be most popular.
Question: Will Type II compensation work in a design like mine where the output of the supply goes through a second order filter? I have read that each LC stage adds a 180 degree phase shift?? If this is correct then I bet I could potentially have a very unstable supply.
2. What kind of power dissipation is acceptable in an ETD39 core set? Does 3W max copper loss and 3W max core loss sound acceptable?
Any discussion and suggestions about my design would be greatly appreciated.
Attachments
I think you would be better of with type3 feedback, and there is really only few more components, and yes, LC does add 180°, that's why I'm not sure type 2 will be enough
I guess about core losses, you will have to find out, how much will core or winding heat up, if it is in safe zone at all times, then you are good to go, if not, then forced cooling or bigger core
I guess about core losses, you will have to find out, how much will core or winding heat up, if it is in safe zone at all times, then you are good to go, if not, then forced cooling or bigger core
This output filter with 4 poles looks really hard to compensate for stability, capacitor ESR may help... But no, there is almost no way to make either the current or the voltage loops stable with your feedback arrangement, it has to be redesigned completely. Some control loop theory may help (a system is stable if phase shift is less than 180 deg. at the frequency where open loop gain and closed loop gain met).
3+3W are ok for ETD39, and more probably too...
3+3W are ok for ETD39, and more probably too...
I believe I have improved my design but I am still unsure if it will be stable. I am using current mode control which I don'f fully understand but it seems to work for everyone else. I also am only using one LC output filter stage so I hope the output will be easier to compensation. I believe type II compensation will work for a design using only one LC filter like my design does.
Can I still use the constant current/constant voltage design I want with primary current feedback as well?
I am hoping that this is a design I can move forward with. Any suggestions?
Can I still use the constant current/constant voltage design I want with primary current feedback as well?
I am hoping that this is a design I can move forward with. Any suggestions?
Attachments
I dunno exactly why you are using behind the EMI-filter another inductor (of the same kind) plus the capacitors C20 and C21 each having 47uF(!). Oooops, after zooming in I figured out that they're just ".47uF" - this little grey dot is hard to see anyhow. A leading "0" would be nice. It makes things better readable. At least according to my opinion.
Nevertheless the purposes for the NTC (inrush-current limiting) and R23 (discharing the caps C20 and C21) are obvious though.
Concerning if it will work now or not, we better wait for a statement from Eva.
Nevertheless the purposes for the NTC (inrush-current limiting) and R23 (discharing the caps C20 and C21) are obvious though.
Concerning if it will work now or not, we better wait for a statement from Eva.
I have a number of comments, most of them minor. The circuit overall looks about right.
Why use a doubler? I don't see a 120/240 switch, so it's not for line capacity. A doubler has far worse power factor than FWB, and doesn't gain you anything in the output stage -- at 160V, use MOSFETs rated half the voltage and twice the amperage. Rds(on) scales accordingly, so efficiency will be about the same.
R16 and R14 are superfluous, as they only provide a DC leakage path, which the GDT is much better at. If you have some sort of connection there (e.g., seperate control and power boards?), then leakage would be good to help reduce ESD. In that case, a 15V antiseries zeners would be perfect.
Instead of C22, you can cut C11/C12 away from C9/C10, which can be smaller (0.47uF or so). Don't worry about bypassing the electrolytics, snap-ins are surprisingly good. It is a good idea to place C11/C12 directly in front of Q1/Q2 though.
For Q1/Q2, why IRFP anything? They're so old, and in this case, excessively overpowered. At 320V and only 250W output, with a typical duty cycle of 33% let's say, you'll need a maximum of 2.5A through the MOSFETs. 5-10A FETs in a TO-220 size are cheap and plentiful, and newer ones are more efficient and easier to drive (the IRFP460 claims 210nC total gate charge!!).
The snubber R18+C14 should be placed at the inverter output, so it snubs C22 and the CT's stray inductance as well.
I think the power transformer should have closer to a 2:1 turns ratio. This reduces duty cycle at full output, but increases supply tolerance. If your desire is to have 50V as more of an "absolute maximum output at rated input voltage" where regulation and ripple may become questionable, then you can use duty cycle as a limiting factor and keep the turns ratio shown.
At 50V, you can also use a FWB rectifier. You don't gain much for using a FWCT output, it's only 2.5A per leg. Also, are those schottky diodes shown? Silicon schottkies will NOT work in this circuit, they have to be rated for at least 150V (I think the highest silicon shottky offered is 100V, and they may not be much better than comparable ultrafast diodes).
I don't think you'll get away with driving the GDT from the '3525. Its bipolar totem pole output will have about 3V of slop in the "off" state. Add leakage inductance into the mix and you may get cross conduction! A CMOS gate driver (I assume the MAX627 is a typical example) is an excellent choice for this purpose. Also, you probably don't need schottky output protection diodes, as the MOSFET output structure should sink inductive currents. How much is iffy, as CMOS structures are all vulnerable to latchup.
Alright, last comment. Your feedback may be backwards. Doublecheck this, the 3525's PWM output is probably inverted with respect to the internal error amp's inputs. I have more experience with the TL494, where I know this is true -- you put your voltage/current feedback to the +in on the error amp(s), and reference and compensation to -in. The COMP output is inverted by the PWM comparator.
HTH,
Tim
Why use a doubler? I don't see a 120/240 switch, so it's not for line capacity. A doubler has far worse power factor than FWB, and doesn't gain you anything in the output stage -- at 160V, use MOSFETs rated half the voltage and twice the amperage. Rds(on) scales accordingly, so efficiency will be about the same.
R16 and R14 are superfluous, as they only provide a DC leakage path, which the GDT is much better at. If you have some sort of connection there (e.g., seperate control and power boards?), then leakage would be good to help reduce ESD. In that case, a 15V antiseries zeners would be perfect.
Instead of C22, you can cut C11/C12 away from C9/C10, which can be smaller (0.47uF or so). Don't worry about bypassing the electrolytics, snap-ins are surprisingly good. It is a good idea to place C11/C12 directly in front of Q1/Q2 though.
For Q1/Q2, why IRFP anything? They're so old, and in this case, excessively overpowered. At 320V and only 250W output, with a typical duty cycle of 33% let's say, you'll need a maximum of 2.5A through the MOSFETs. 5-10A FETs in a TO-220 size are cheap and plentiful, and newer ones are more efficient and easier to drive (the IRFP460 claims 210nC total gate charge!!).
The snubber R18+C14 should be placed at the inverter output, so it snubs C22 and the CT's stray inductance as well.
I think the power transformer should have closer to a 2:1 turns ratio. This reduces duty cycle at full output, but increases supply tolerance. If your desire is to have 50V as more of an "absolute maximum output at rated input voltage" where regulation and ripple may become questionable, then you can use duty cycle as a limiting factor and keep the turns ratio shown.
At 50V, you can also use a FWB rectifier. You don't gain much for using a FWCT output, it's only 2.5A per leg. Also, are those schottky diodes shown? Silicon schottkies will NOT work in this circuit, they have to be rated for at least 150V (I think the highest silicon shottky offered is 100V, and they may not be much better than comparable ultrafast diodes).
I don't think you'll get away with driving the GDT from the '3525. Its bipolar totem pole output will have about 3V of slop in the "off" state. Add leakage inductance into the mix and you may get cross conduction! A CMOS gate driver (I assume the MAX627 is a typical example) is an excellent choice for this purpose. Also, you probably don't need schottky output protection diodes, as the MOSFET output structure should sink inductive currents. How much is iffy, as CMOS structures are all vulnerable to latchup.
Alright, last comment. Your feedback may be backwards. Doublecheck this, the 3525's PWM output is probably inverted with respect to the internal error amp's inputs. I have more experience with the TL494, where I know this is true -- you put your voltage/current feedback to the +in on the error amp(s), and reference and compensation to -in. The COMP output is inverted by the PWM comparator.
HTH,
Tim
Thank you for the reply! I will address all of your points:
"Why use a doubler? I don't see a 120/240 switch, so it's not for line capacity. A doubler has far worse power factor than FWB, and doesn't gain you anything in the output stage -- at 160V, use MOSFETs rated half the voltage and twice the amperage. Rds(on) scales accordingly, so efficiency will be about the same."
I couldn't think of a good reason either so I will do exactly what you suggested. As a side effect, my transformer winding will be easier and I can use a 1:1 winding ratio (or is it 2:1?)
"R16 and R14 are superfluous, as they only provide a DC leakage path, which the GDT is much better at. If you have some sort of connection there (e.g., seperate control and power boards?), then leakage would be good to help reduce ESD. In that case, a 15V antiseries zeners would be perfect."
Totally valid point but I will leave them so I am less likely to blow up my inverter during testing if I leave the GDT disconnected.
"Instead of C22, you can cut C11/C12 away from C9/C10, which can be smaller (0.47uF or so). Don't worry about bypassing the electrolytics, snap-ins are surprisingly good. It is a good idea to place C11/C12 directly in front of Q1/Q2 though."
Done.
"For Q1/Q2, why IRFP anything? They're so old, and in this case, excessively overpowered. At 320V and only 250W output, with a typical duty cycle of 33% let's say, you'll need a maximum of 2.5A through the MOSFETs. 5-10A FETs in a TO-220 size are cheap and plentiful, and newer ones are more efficient and easier to drive (the IRFP460 claims 210nC total gate charge!!)."
I hadn't planed on using them anyway, I just specified them because I figured someone else might use my design someday and it would be best for me to use a standard and "classic" part. Ill likely pick a 250v or greater mosfet with 0.15 ohms RDS max.
"The snubber R18+C14 should be placed at the inverter output, so it snubs C22 and the CT's stray inductance as well."
I hadn't thought of this, thanks!
"I think the power transformer should have closer to a 2:1 turns ratio. This reduces duty cycle at full output, but increases supply tolerance. If your desire is to have 50V as more of an "absolute maximum output at rated input voltage" where regulation and ripple may become questionable, then you can use duty cycle as a limiting factor and keep the turns ratio shown."
I believe now that I have removed the doubler I should be using around a 1:1 ratio. This would give a theoretical 80v output at 100% duty cycle.
"At 50V, you can also use a FWB rectifier. You don't gain much for using a FWCT output, it's only 2.5A per leg. Also, are those schottky diodes shown? Silicon schottkies will NOT work in this circuit, they have to be rated for at least 150V (I think the highest silicon shottky offered is 100V, and they may not be much better than comparable ultrafast diodes)."
I had wanted to avoid this to reduce power dissipation in the rectification stage, but you have a good point, at 5A output I will only dissipate 10W or so in the rectification stage and I will simplify the winding of my transformer. If I Can't find a high voltage shottky Diode, I will use ultra fast diodes.
"I don't think you'll get away with driving the GDT from the '3525. Its bipolar totem pole output will have about 3V of slop in the "off" state. Add leakage inductance into the mix and you may get cross conduction! A CMOS gate driver (I assume the MAX627 is a typical example) is an excellent choice for this purpose. Also, you probably don't need schottky output protection diodes, as the MOSFET output structure should sink inductive currents. How much is iffy, as CMOS structures are all vulnerable to latchup."
I actaully happen to have some MAX627's right here. I had been considering using them anyway. I am using a UC3825 not a 3525 though. The 3825 has a 2A peek output driver, but for good measure I will use the MAX627.
"Alright, last comment. Your feedback may be backwards. Doublecheck this, the 3525's PWM output is probably inverted with respect to the internal error amp's inputs. I have more experience with the TL494, where I know this is true -- you put your voltage/current feedback to the +in on the error amp(s), and reference and compensation to -in. The COMP output is inverted by the PWM comparator."
I believe I have setup the feedback correctly, but I will check to be sure.
Thank you for the wonderful design review.
"Why use a doubler? I don't see a 120/240 switch, so it's not for line capacity. A doubler has far worse power factor than FWB, and doesn't gain you anything in the output stage -- at 160V, use MOSFETs rated half the voltage and twice the amperage. Rds(on) scales accordingly, so efficiency will be about the same."
I couldn't think of a good reason either so I will do exactly what you suggested. As a side effect, my transformer winding will be easier and I can use a 1:1 winding ratio (or is it 2:1?)
"R16 and R14 are superfluous, as they only provide a DC leakage path, which the GDT is much better at. If you have some sort of connection there (e.g., seperate control and power boards?), then leakage would be good to help reduce ESD. In that case, a 15V antiseries zeners would be perfect."
Totally valid point but I will leave them so I am less likely to blow up my inverter during testing if I leave the GDT disconnected.
"Instead of C22, you can cut C11/C12 away from C9/C10, which can be smaller (0.47uF or so). Don't worry about bypassing the electrolytics, snap-ins are surprisingly good. It is a good idea to place C11/C12 directly in front of Q1/Q2 though."
Done.
"For Q1/Q2, why IRFP anything? They're so old, and in this case, excessively overpowered. At 320V and only 250W output, with a typical duty cycle of 33% let's say, you'll need a maximum of 2.5A through the MOSFETs. 5-10A FETs in a TO-220 size are cheap and plentiful, and newer ones are more efficient and easier to drive (the IRFP460 claims 210nC total gate charge!!)."
I hadn't planed on using them anyway, I just specified them because I figured someone else might use my design someday and it would be best for me to use a standard and "classic" part. Ill likely pick a 250v or greater mosfet with 0.15 ohms RDS max.
"The snubber R18+C14 should be placed at the inverter output, so it snubs C22 and the CT's stray inductance as well."
I hadn't thought of this, thanks!
"I think the power transformer should have closer to a 2:1 turns ratio. This reduces duty cycle at full output, but increases supply tolerance. If your desire is to have 50V as more of an "absolute maximum output at rated input voltage" where regulation and ripple may become questionable, then you can use duty cycle as a limiting factor and keep the turns ratio shown."
I believe now that I have removed the doubler I should be using around a 1:1 ratio. This would give a theoretical 80v output at 100% duty cycle.
"At 50V, you can also use a FWB rectifier. You don't gain much for using a FWCT output, it's only 2.5A per leg. Also, are those schottky diodes shown? Silicon schottkies will NOT work in this circuit, they have to be rated for at least 150V (I think the highest silicon shottky offered is 100V, and they may not be much better than comparable ultrafast diodes)."
I had wanted to avoid this to reduce power dissipation in the rectification stage, but you have a good point, at 5A output I will only dissipate 10W or so in the rectification stage and I will simplify the winding of my transformer. If I Can't find a high voltage shottky Diode, I will use ultra fast diodes.
"I don't think you'll get away with driving the GDT from the '3525. Its bipolar totem pole output will have about 3V of slop in the "off" state. Add leakage inductance into the mix and you may get cross conduction! A CMOS gate driver (I assume the MAX627 is a typical example) is an excellent choice for this purpose. Also, you probably don't need schottky output protection diodes, as the MOSFET output structure should sink inductive currents. How much is iffy, as CMOS structures are all vulnerable to latchup."
I actaully happen to have some MAX627's right here. I had been considering using them anyway. I am using a UC3825 not a 3525 though. The 3825 has a 2A peek output driver, but for good measure I will use the MAX627.
"Alright, last comment. Your feedback may be backwards. Doublecheck this, the 3525's PWM output is probably inverted with respect to the internal error amp's inputs. I have more experience with the TL494, where I know this is true -- you put your voltage/current feedback to the +in on the error amp(s), and reference and compensation to -in. The COMP output is inverted by the PWM comparator."
I believe I have setup the feedback correctly, but I will check to be sure.
Thank you for the wonderful design review.
Attachments
Oops, 3825, right you are! Let's see... ahh, it's slightly different (hence the different pinout and wiring!), and significantly faster (including error amp, oscillator and output sections). 2A peak output is quite impressive for a bipolar output. Unfortunately, it does indeed have about 2V of 'slop', due to the bipolar structure, so you should still use the MAX627's, which will drive fairly close to the rails. If you were driving MOSFETs locally (say, if you were making an automotive DC-DC converter), the 3825 would do a most excellent job on its own.
MAX627's don't look very impressive. I guess they have TTL level input and some buffering (= gain = sharper output), but not UVLO or anything fancier. Compare for instance with the TC4420, which does 6A peak and includes UVLO (although it's only a single, and the dual output chip in the same product line actually does the same current as the MAX627.) Oh well, the 3825 provides UVLO, so it won't be a big deal.
Tim
MAX627's don't look very impressive. I guess they have TTL level input and some buffering (= gain = sharper output), but not UVLO or anything fancier. Compare for instance with the TC4420, which does 6A peak and includes UVLO (although it's only a single, and the dual output chip in the same product line actually does the same current as the MAX627.) Oh well, the 3825 provides UVLO, so it won't be a big deal.
Tim
Maybe it is very old, but I learnt a lot of things in this thread. I was pleasantly surprised about the adjustability voltage/current limit as I was thinking in a similiar fashion. I have a few doubts -
Is it not ok to connect the 3825 outputs to drive the GDT directly instead of thro' max627, as the 3825 provides 2A drive current? Max627 will only add some more delay?
With a single stage output filter (LC), was type 2 compensation network sufficient?
Did you have the II stage output filter, and, if so, whether within the control loop or outside, and, what was the compensation used?
Thanks in advance.
Is it not ok to connect the 3825 outputs to drive the GDT directly instead of thro' max627, as the 3825 provides 2A drive current? Max627 will only add some more delay?
With a single stage output filter (LC), was type 2 compensation network sufficient?
Did you have the II stage output filter, and, if so, whether within the control loop or outside, and, what was the compensation used?
Thanks in advance.
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