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Old 24th August 2009, 04:02 AM   #1
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Default Does resonance at 1M Hertz matter for audio?

Considering the output inductance of around 5uH of a typical 3-terminal regulator, the bypass capacitors of 0.1uF at any opamp supply pins and other bypass capacitors, the ESR and wire resistence of the circuit boards, the effective LCR circuit will have some high Q resonance anywhere from 500kHz to 2M Hertz, depending on the values of the LCR. After spending the whole morning modelling it using LTSpice I have not found a way to get rid of resonance, unless I padded enough resistence to make the capacitors ineffective, which is pointless. If wrong capacitors are used the circuit can resonate right at the audio spectrum of 20Hz - 20kHz. I can not eliminate the resonace. I can only push it to 500kHz or above.

Does it matter to have a power supply high Q resonance at 500kHz or above? Would the opamps overheat? Would there be other problems?

Regards,
Bill
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Old 24th August 2009, 04:06 AM   #2
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Also another question.

I have a capacitor multiplier after the regulator. Can I assume the capacitor multiplier to be a huge capacitor in the LCR circuit analysis?
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Old 24th August 2009, 03:54 PM   #3
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You might have heard that designing a linear regulator is just like designing and amplifier. This is true in most ways.

A properly designed amplifier will not have resonances or load preference (or if it does it will be to a minimal level).

With a linear regulator, the output impedance begins to increase above a certain frequency. At that point, we add a bypass capacitor (aside from the decoupling caps if you want more performance). If the value of the cap is large enough, the cap will take care of the HF signals instead of the regulator. So in short, if you want to help get rid of resonances, why not try say, a 390u bypass cap (in addition to the decoupling cap)? This is relatively easy to see the effects of in LTSpice if you run an AC analysis. In my playings with the simulator, sometimes values of 10mF were necessary to remove the HF impedance increase, with my worse designs! The necessary value of this cap will depend on the regulator's load rejection and its HF characteristics. For one of the chip regulators this cap shouldn't have to be too large.

I think what I'm saying is relevant to the topic.

The capacitance multiplier will probably be a factor. However this albeit large capacitor will have a relatively large ESR because of the transistor's transconductance. Surely someone will correct me if I'm wrong?

As far as resonance, you will certainly have a problem if the opamps are oscillating. But in order to start a resonance, you have to supply at least for an instant some energy at the frequency of the resonance. If you use a switching supply, perhaps induced spikes could cause this ringing (perhaps an application where linear supplies are handy?). If your box isn't shielded, interference from other apliances could potentially instigate the resonance. I don't have experience with these things though.

- keantoken

Last edited by keantoken; 24th August 2009 at 04:00 PM.
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Old 25th August 2009, 02:27 AM   #4
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Keantoken,

Thanks for your reply.

No manufacturers have recommended using very large capacitors at the output of the 3 terminal regulators. From LTSpice, I can easily see that a low ESR capacitor from 47uF to 470uF can create a resonance peak of up to 20dB between 500Hz to 5kHz. However, I have found that by using a large capacitor of 2,200uF in series with 0.1R at the regulator output, it can damp that resonance to below 1dB. A capacitor multiplier is even better, provided that it has low ESR.

Most op amp datasheets recommend using a 0.1uF ceramic (I use MKP 0.1uF with a 0.03R ESR) at the op amp pin for bypass. I mentioned in my first post that this creates some high Q resonance between 500k Hertz and 2M Hertz that can not be cured even with the damping as described above, when combining the 5uH output inductance of the regulator and the ESR and ESL of the bypass caps, as well as PCB track R and L. I observed them more carefully this time and found them to be more of a high Q dip than a high Q peak of 20dB magnitude. Actually, with the capacitor values I used, the resonances are at 3M Hertz. I don't know if they are harmful or not, as the amplitude should be less than 0dB.

The capacitor multiplier (CM) I used was from JLH. He claimed that the CM creates an equivalent 0.5 Farad, with an impedance less than 0.02R from 500Hz to 30kHz. So I was wondering if I should model it in LTSpice as a 0.5 Farad 0.02R capacitor.

I would like to upload some pictures from my LTSpice modelling, which would say a lot more, but unfortunately, after I changed my ISP, I have not been able to store any photos. I will work on it.

Regards,
Bill
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Old 25th August 2009, 03:06 AM   #5
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Old 25th August 2009, 04:23 AM   #6
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i've seen 3 terminal regulators used in just about everything, even digital logic running at 1Mhz clock frequencies, and the only time i've seen them misbehave was when the decoupling caps were dried out and had high ESR. that said, there is usually a small amount of "hash" on a 78xx regulator when powering digital devices, but it's usually far below the level where it would cause a problem. as far as powering analog from them, i've never seen any effects that would be a problem. properly designed analog circuits would have decoupling caps all over the place, maybe not as much as with digital circuits, but definitely enough to swamp the inductive effects of the regulators.
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Old 25th August 2009, 04:41 AM   #7
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There's an ap note on the noise peaking phenomena- I think it's in Bob Pease's book. Don't know if it's on the web or not. That's a lot different than out and out oscillation, which doesn't usually occur if you follow anywhere near the manufacturer's recommendations for the reg. Chances are that you're not modeling the caps correctly- hardly anybody does. There are some old posts on the matter, but in essence ESR can't be modeled as a constant resistance. That becomes clear when you look at the formulas for dissipation factor. In real circuitry you can kill the noise peak with some strategically placed resistance, without compromising the filtering. You can also just swamp the thing out, as the Q (1/D) will be so low as not to matter.
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Old 25th August 2009, 07:41 AM   #8
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Quote:
Originally Posted by HiFiNutNut View Post
Keantoken,

Thanks for your reply.

No manufacturers have recommended using very large capacitors at the output of the 3 terminal regulators. From LTSpice, I can easily see that a low ESR capacitor from 47uF to 470uF can create a resonance peak of up to 20dB between 500Hz to 5kHz. However, I have found that by using a large capacitor of 2,200uF in series with 0.1R at the regulator output, it can damp that resonance to below 1dB. A capacitor multiplier is even better, provided that it has low ESR.

Most op amp datasheets recommend using a 0.1uF ceramic (I use MKP 0.1uF with a 0.03R ESR) at the op amp pin for bypass. I mentioned in my first post that this creates some high Q resonance between 500k Hertz and 2M Hertz that can not be cured even with the damping as described above, when combining the 5uH output inductance of the regulator and the ESR and ESL of the bypass caps, as well as PCB track R and L. I observed them more carefully this time and found them to be more of a high Q dip than a high Q peak of 20dB magnitude. Actually, with the capacitor values I used, the resonances are at 3M Hertz. I don't know if they are harmful or not, as the amplitude should be less than 0dB.

The capacitor multiplier (CM) I used was from JLH. He claimed that the CM creates an equivalent 0.5 Farad, with an impedance less than 0.02R from 500Hz to 30kHz. So I was wondering if I should model it in LTSpice as a 0.5 Farad 0.02R capacitor.

I would like to upload some pictures from my LTSpice modelling, which would say a lot more, but unfortunately, after I changed my ISP, I have not been able to store any photos. I will work on it.

Regards,
Bill
Using large capacitors on the output of a regulator might not be recommended because the reg can dump a lot of current into the capacitor in a small period of time (dunno if this is important for 3-T regs since most are current limited around 1.5A).

If the multiplier's output impedance is not at least lower than that of the regulator alone, then I don't think there will be a significant advantage. Modeling the multiplier as a cap and resistor as you say should work well enough.

Okay, I am familiar with capacitance multipliers (though not specifically about the JLH design you speak of). If you use a Darlington for the multiplier, about the only advantage over a single transistor will be higher current gain. Darlington configuration increases output impedance over a single transistor, and this might swamp out any advantage gained by the high capacitance. So instead, I suggest using a CFP instead of darlington. On the simulator, output impedance dropped by over a factor of 10 (with the transistors chosen, impedance of the Darlington was about 58mohms, impedance of the CFP was only 3m, and both had the same response). To put things in perspective, 3mOhms of the CFP will correspond to about 50.5db of load rejection. 60mOhms corresponds to about 24.4db. This means that say, as -40db load rejection regulator would benefit from a CFP multiplier but wouldn't gain much from a Darlington multiplier. I will post this simulation data if asked.

Why don't you build the circuit and see how large a cap it takes to remove the resonance as much as possible? With very good regulators, it actually takes a larger capacitor.

For cross-reference:
LM340: 8mOhms series resistance. -42db
CFP Cap multiplier: 3mOhms -50.4
Darlington multiplier: 58mOhms -24.4

- keantoken
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Old 25th August 2009, 09:01 AM   #9
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---Bob Pease's book---


I think Pease tells a story where a batch of new electrolytics used in a previously very reliable circuit caused instalibility : they had too low ESR.
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Old 25th August 2009, 09:16 AM   #10
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Quote:
Originally Posted by HiFiNutNut View Post
Considering the output inductance of around 5uH of a typical 3-terminal regulator, the bypass capacitors of 0.1uF at any opamp supply pins and other bypass capacitors, the ESR and wire resistence of the circuit boards, the effective LCR circuit will have some high Q resonance anywhere from 500kHz to 2M Hertz, depending on the values of the LCR. After spending the whole morning modelling it using LTSpice I have not found a way to get rid of resonance, unless I padded enough resistence to make the capacitors ineffective, which is pointless. If wrong capacitors are used the circuit can resonate right at the audio spectrum of 20Hz - 20kHz. I can not eliminate the resonace. I can only push it to 500kHz or above.

Does it matter to have a power supply high Q resonance at 500kHz or above? Would the opamps overheat? Would there be other problems?

Regards,
Bill
Keep in mind, that you most often have also an electrolytic cap somewhere near reg's output. It should provide some usefull ESR. That's why when small bypass caps are used as well, I prefer to not use a low-ESR electrolytic.
If you need a long PCB track or are affraid of resonances or want to kill some potential resosnace for any reason, than a ferrite bead in series and/or snubber in parrallel are your friends.

You may try simulating different snubbers and ferrite beads, the latter should be more helpful in killing track inductance problems.

PSU resonances are real pain for audio, mainly in respect to opamps and DACs, they do matter several octaves above 20kHz and taming them can be vital, that is one of "easier heard then directly measured" things.

P.S. 5uH from a regulator is hardly a real inductance

Last edited by darkfenriz; 25th August 2009 at 09:21 AM. Reason: postscriptum
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