I've been perusing these forums for a long time and finally registered 
Excited to get involved.
In reading, I've found a recurring theme and wanted to see if I could get consolidated info on it. A lot of users want to design high powered (kw range) converters and typically get responses like "start lower and move up" or "that's really hard for beginners" in between the advice and replies. Another one is that beginners (like me ) need a lot of guidance and time. I've built hobby low-powered SMPSs and understand the theory, but have no idea what problems start popping up at high powers.
In looking around, I found alot of info spread out across lots of threads, some of them many pages long.
I'm looking for somewhere that has basically a list of things to take into account as you increase power like:
-parasitic behavior to take into account
-physical design of PCB and case to isolate components
-peak currents that can cause avalanche breakdown in FETs
-ZVS for dummies (I've read a dozen articles on this and still don't understand how it differs from normal function - maybe I'm just not smart enough
don't even understand what manages it, the PWM?)
and other things I've seen but don't fully understand. I'm in the process of getting what's been called the "bible" of SMPS by someone here (Chryssis, Pressman, and Brown), but I just finished college and am a bit burnt out on text books, so going through page-by-page of texts might take me a while. Is there a "complete guide to high power design considerations"? If not, maybe the pros here can post some replies and make this thread the goto guide!
Excited to get involved.In reading, I've found a recurring theme and wanted to see if I could get consolidated info on it. A lot of users want to design high powered (kw range) converters and typically get responses like "start lower and move up" or "that's really hard for beginners" in between the advice and replies. Another one is that beginners (like me
) need a lot of guidance and time. I've built hobby low-powered SMPSs and understand the theory, but have no idea what problems start popping up at high powers.In looking around, I found alot of info spread out across lots of threads, some of them many pages long.
I'm looking for somewhere that has basically a list of things to take into account as you increase power like:
-parasitic behavior to take into account
-physical design of PCB and case to isolate components
-peak currents that can cause avalanche breakdown in FETs
-ZVS for dummies (I've read a dozen articles on this and still don't understand how it differs from normal function - maybe I'm just not smart enough
don't even understand what manages it, the PWM?)and other things I've seen but don't fully understand. I'm in the process of getting what's been called the "bible" of SMPS by someone here (Chryssis, Pressman, and Brown), but I just finished college and am a bit burnt out on text books, so going through page-by-page of texts might take me a while. Is there a "complete guide to high power design considerations"?
If not, maybe the pros here can post some replies and make this thread the goto guide!
Well lets say what others and yourself already did, start at low voltages and make that work, trust me, I've been there, and I got nowhere until I undertood what is going on.
Also If you have low power to work, ist only steping up in components rating for higher power. Its nothing to it, to get 1kw+, but make it work under all and every condition it something else [like feedback, unregulated supply is easy, anyone could do in then sleep ]
After you get your answers on your qestions, make some schematic, so you can show, what you'll go with, and so that we change something if needed
Good luck
PS: I think I got those books you are looking for
Also If you have low power to work, ist only steping up in components rating for higher power. Its nothing to it, to get 1kw+, but make it work under all and every condition it something else [like feedback, unregulated supply is easy, anyone could do in then sleep ]
After you get your answers on your qestions, make some schematic, so you can show, what you'll go with, and so that we change something if needed
Good luck
PS: I think I got those books you are looking for
Hi
What do you want to do?
Its really hard to write a list of things to watch out for with no specific topology or requirements. I think the advice for lower power is generally fair advice for someone with little to no experience. Also things start getting expensive with higher power esp if you start blowing stuff up and have to redo your PWB/magnetics a few times. What test equipment do you have or think you need for 1KW+ SMPS development?
The general knowledge you need covers a lot of ground .... what guides or experience you have with the list below can let you advance more quickly than most newbies.
Safety requirements
control theory
gate drive
magnetics design
snubbers
EMI/ PFC
V/I regulation/slow start/overcurrent/overvoltage
What do you want to do?
Its really hard to write a list of things to watch out for with no specific topology or requirements. I think the advice for lower power is generally fair advice for someone with little to no experience. Also things start getting expensive with higher power esp if you start blowing stuff up and have to redo your PWB/magnetics a few times. What test equipment do you have or think you need for 1KW+ SMPS development?
The general knowledge you need covers a lot of ground .... what guides or experience you have with the list below can let you advance more quickly than most newbies.
Safety requirements
control theory
gate drive
magnetics design
snubbers
EMI/ PFC
V/I regulation/slow start/overcurrent/overvoltage
What's the largest power supply you have built so far and what are its specifications? If that one works, the next one you should build should be just a bit bigger and more complex.
Then again, high power is not that difficult if the circuit is simple. Here's a buck converter rated for 72kw for an EV: http://ecomodder.com/forum/showthread.php/paul-sabrinas-cheap-144v-motor-controller-6404.html
Note that the builder has had very little previous electronics experience. But the circuit is simple as the windings in the motor act as the inductor.
Another good example of a high power but very simple power supply is the electronic controller for an electric tankless water heater. They usually just have two SCRs acting like a very large light dimmer. (It is considered a switching power supply since the power devices are practically completely on or off at any given instant.)
Then again, high power is not that difficult if the circuit is simple. Here's a buck converter rated for 72kw for an EV: http://ecomodder.com/forum/showthread.php/paul-sabrinas-cheap-144v-motor-controller-6404.html
Note that the builder has had very little previous electronics experience. But the circuit is simple as the windings in the motor act as the inductor.
Another good example of a high power but very simple power supply is the electronic controller for an electric tankless water heater. They usually just have two SCRs acting like a very large light dimmer. (It is considered a switching power supply since the power devices are practically completely on or off at any given instant.)
luka said:
I have a half-bridge topology on a pretty small supply. I don't fully understand the magnetics involved and therefor the actual power limits based on the transformer, but I'm purposely current limiting it with a couple power resistors. I was under the impression that I'd have to change the topology for higher power, although I don't know why - the full bridge topologies still use FETS with similar currents, and you can always parallel the FETS if you need more power. Any insight on the need for different topologies?
infinia said:
I'm not sure what I want to do
I have a bunch of hobbies that will probably require specific power supplies, so I'm trying to learn about them (I used a flyback from an old CRT to build a little arc speaker, which makes potentials in the kV range! crazy, and I have no idea how it works). Mainly, I want to be able to convert Mains AC to DC (simple boost circuit or PFC to get 340-400Vdc or so) and then a DC-DC converter which will drop it down to some useful voltages, like 12 or 24. As far as test equipment, I have an o-scope, a multimeter, a few current sensing transformers I'm learning to use, and a variable power supply for my bench that can do up to 24V.Experience...
safety requirements, I feel comfortable limiting power, but not sure what safety needs to be taken at higher voltages/currents. I know high voltages can arc, but I don't imagine I'll ever get that high unless I start building tesla coils
Control theory - I've build a PWM circuit that pulses at 100kHz and I can control the deadtime - beyond that, not sure.
Gate drive - some experience using MOSFET drivers, driver transformers (although I can't seem to get a clean square wave off of these). Things get much more difficult when the source voltage fluctuates like in these topologies, but I feel comfortable with it.
Magnetics design - can do some design calculations, but haven't built them myself. Do most people here build there own transformers? :|
Snubbers - used them on previous design, but it was mostly experimental, not calculation based. I have a few guides on how to do these, but don't know the best implementations. Currently, I've only ever used RC snubbers across Source-Drain on FETS.
EMI/PFC - Never played with EMI (I'm assuming you mean on input stages to avoid blowing breakers or affecting my neighbors?), and PFC - never built one, but I've used IR's design guide to make the schematic for one. Do these get crazy at high powers? I assumed it was a simple controller circuit with a switch FET, boost inductor, and output cap...
V/I regulation/slow start/overcurrent/overvoltage - mostly I've done this at lower powers with the Application Notes and Datasheets from my PWM controller with its built in safeties...does that work?
star882 said:
I made a simple half-bridge topology SMPS limited to 50W (24V, limited to 2amps with a couple power resistors) or so because I have no idea what the transformer can handle. It works decently in the few setups I've used so far. I also use it with a 12V and 5V linear regulator (just ICs I bought) for powering a PIC controller and some fans. I've found a lot of info that suggests moving to full-bridge and ZVS topologies, with possibly a phase shift on the output (wouldn't a PFC input stage take care of that?) for 1kw+ range of power. Mainly, I've read that a lot of things (parasitic behavior?) creep up as you increase power, but I don't know what they are, what to watch for, etc. Are these conductive or can I avoid them by putting each stage in its own faraday cage? I dunno..
Do you have an example design for the SCR design? I've never used them before, but I imagine they can handle a lot more power than FETS...I just don't know enough theory or have enough experience with them to reliably turn them on and off...I vaguely remember that they have a strange issue with turning off. I'll start looking that up.
I guess my biggest concern in going to higher power is that I don't know the non-ideal behavior of devices. Even with the low powered SMPS, my "square wave" isn't really square and I get little spikes in voltage on turn-on for the FETS.
The Vgs on the FETS isn't square at all, but like a steep curve up and then a less-steep curve down. I don't want the FETs to turn on at the wrong time and short the 340Vdc input through the FETs, which is the problem that I can guess at. I'm more worried about the problems I can't guess at
The Vgs on the FETS isn't square at all, but like a steep curve up and then a less-steep curve down. I don't want the FETs to turn on at the wrong time and short the 340Vdc input through the FETs, which is the problem that I can guess at. I'm more worried about the problems I can't guess at
Look up "phase angle control". It is commonly used with resistive loads on AC circuits and certain kinds of small AC motors. Basically, a SCR, once turned on, stays on until the current through it drops below a certain level. AC does that for us 60 times every second for each polarity. So you have a circuit to detect zero crossings of the AC, then turn on the SCR after a variable delay. When the AC goes into another zero crossing, the SCR turns off. Since a SCR is only able to turn on in one direction, two are usually used to ensure full power is available to the load, each one switching on opposite polarities. (There are also triacs that can conduct in both directions, but they cannot handle as much power as SCRs.)tstitans said:
Hi
Test Equipment besides an O-scope, DVMs and lab DC supplies youll need at least a line AC variac, isolation transformer, Tektronics current probe, DC electronic loads. I like to add big analog meters (V and I) on the variac so I can see it out of the corner of my eyes.
Safety - http://focus.ti.com/lit/ml/slup227/slup227.pdf this is a good read on safety for supply designers. Gives most of the language and terms involved. Even DIY folks should heed the rules/ guidelines.
Test Equipment besides an O-scope, DVMs and lab DC supplies youll need at least a line AC variac, isolation transformer, Tektronics current probe, DC electronic loads. I like to add big analog meters (V and I) on the variac so I can see it out of the corner of my eyes.
Safety - http://focus.ti.com/lit/ml/slup227/slup227.pdf this is a good read on safety for supply designers. Gives most of the language and terms involved. Even DIY folks should heed the rules/ guidelines.
Control Theory - stability using feedback ie control systems. This is how you can design your SMPS error amplifier compensation scheme R and C values to ensure stability under variable conditions of line and load. You should understand why SMPS don't like no loads on the main loop.
Control Loop Cookbook - http://focus.ti.com/lit/ml/slup113a/slup113a.pdf
Bode plots - http://focus.ti.com/lit/ml/slup070/slup070.pdf
Control Loop Cookbook - http://focus.ti.com/lit/ml/slup113a/slup113a.pdf
Bode plots - http://focus.ti.com/lit/ml/slup070/slup070.pdf
You asked about ZVS
The technique of zero voltage switching in modern power conversion - http://focus.ti.com/lit/ml/slup089/slup089.pdf
The technique of zero voltage switching in modern power conversion - http://focus.ti.com/lit/ml/slup089/slup089.pdf
I've been reading up on SCRs...controlling them is a bit more complicated than normal gate drive for FETs, but I think I'm understanding it. I'll keep working on that,
Infinia, Thanks for the info on safety and other things, I'll be reading up on those links.
Questions:
What are the pros and cons of using an IGBT instead of a FET? I've never really played with them, but my understanding is that their gate drive is the same (just swap IGBTs into my design in place of FETs, is that ok?) the difference is that you're replacing channel resistance with a set voltage drop. So, my math tells me that FETs are better at lower currents with low channel resistance while IGBTs are better at high currents because you go back down to a power of 1 for the I. Looking them up, I find that at high powers, IGBTs are a lot cheaper, sometimes like 1/4 the cost!
Also,
I have a variac now, will need to get a current probe. DC electronic loads? Not sure what or where to get it, any suggestions? so far I've just been using power resistors that I have laying around.
Infinia, Thanks for the info on safety and other things, I'll be reading up on those links.
Questions:
What are the pros and cons of using an IGBT instead of a FET? I've never really played with them, but my understanding is that their gate drive is the same (just swap IGBTs into my design in place of FETs, is that ok?) the difference is that you're replacing channel resistance with a set voltage drop. So, my math tells me that FETs are better at lower currents with low channel resistance while IGBTs are better at high currents because you go back down to a power of 1 for the I. Looking them up, I find that at high powers, IGBTs are a lot cheaper, sometimes like 1/4 the cost!
Also,
I have a variac now, will need to get a current probe. DC electronic loads? Not sure what or where to get it, any suggestions? so far I've just been using power resistors that I have laying around.
What output voltages are you planning on? Low voltage halogen bulbs work nicely for low voltages as do common household light bulbs for high voltages. For higher powers, heating elements are the cheapest per watt. And of course, there are also power resistors for small loads.
BTW, there are some interesting stories about various "unusual" loads for testing power supplies. At one automotive parts store, they had a large power inverter connected to a space heater for testing car batteries. I have used hair dryers to load test large UPSes. So far, however, the best story I have heard was when a friend of mine was building a server. He needed to load test the power supply, so he made some test loads out of heating element wire. It gets a little boring to wait for the load test to finish, so he invited some of his friends to toast marshmallows over the hot coils! The load test ended up running longer than planned, but the power supply passed it anyways.
BTW, there are some interesting stories about various "unusual" loads for testing power supplies. At one automotive parts store, they had a large power inverter connected to a space heater for testing car batteries. I have used hair dryers to load test large UPSes. So far, however, the best story I have heard was when a friend of mine was building a server. He needed to load test the power supply, so he made some test loads out of heating element wire. It gets a little boring to wait for the load test to finish, so he invited some of his friends to toast marshmallows over the hot coils! The load test ended up running longer than planned, but the power supply passed it anyways.
You are right about IGBT. The price of lower conduction losses at higher currents is a current tail after turn off, longer or shorter depending on the type of IGBT. There is a compromise between Vce-sat and the length of the tail. IGBT with lower Vce-sat suffer from a longer current tail.
Another main difference is body diode. MOSFET have an intrinsic diode that, when forward biased, may store a lot of charge like a standard rectifier, like several uC, particularly on old >100V Vds parts. Recovery process on these older parts is quite delicate, because a too high dV/dt when Vds rises at diode turn-off may result in fatal latch-up, only most newer <=100V devices (and some <=250V) are expected to handle more than 5V/ns reliably.
All newer parts rated at more than 250V still exhibit that behaviour, except one particular family of 600V MOSFET by Infineon (like SPW35N60CFD). Clones by Fairchild are considerably worse, although they look similar on paper. IXYS seems to produce some of that stuff too, but I never liked it, at least on paper, and it's quite expensive.
On the other hand, IGBT doesn't exhibit any diode behaviour when reverse Vce is applied, so they require a diode in all applications involving reverse conduction. Some parts already include an ultrafast or hyperfast diode "co-packaged", on others you are free to choose. When the co-pack IGBTs are break opened, two separate dies are clearly seen (there is usually room for the diode, as an IGBT requires a much smaller die than a MOSFET rated at the same current and voltage.
At blocking voltages of 400V or higher, MOS transistors start to require very big dies and a lot of silicon (expensive) to approach the conduction losses of IGBT, but they don't suffer from current tail problems, except the ones related to spread internal gate resistance, that may be as high as 10, 20 or even 30 ohm for some (not very good) models, but typically 0.5 to 5 ohm for decent stuff.
For example, a few days ago I measured 2.2 ohms on IRFB4227 and 26 ohms for IRFZ48V, but the latter is a bit outdated. Internal gate resistance is only specified on the datasheets of some of the most recent parts. MOSFET with high internal Rg exhibit a current tail too because not all the die switches at the same time (something not documented but measurable). This leads to hard to explain efficiency problems.
An approach for extreme efficiency is to use MOSFET and IGBT in parallel and turn off the IGBT first, then wait a fixed time for current tail extinction, then turn off the MOSFET, but this imposes a delay on switching (100ns to 1us depending on the type of IGBT) not acceptable in all applications (ok for PFC, SMPS and inverters, not for 300Khz audio class D).
Another advantage is lower conduction losses at low currents. For example, I have achieved 97% efficiency on PFCs and 120V sinewave inverters at 1500W that way (with the help of Infineon's 600V MOSFET with fast body diodes and soft-switching magnetic-snubbers too).
And concerning switching power electronics in general, modelling parasitics is very important. For example, film and electrolytic capacitors exhibit approx. 1nH inductance per milimeter of terminal spacing, but you are not likely to see that information anywhere, I had to find it out on the workbench.
This implies that physically big film caps are useless for HF decoupling, but this fact is surprisingly ignored by many designers, resulting in hard to tame ringing <30Mhz (the lower the freq, the harder) that requires several EMI filter stages for propper attenuation before it goes into the outer world.
Parasitic inductance data for TO-220 and TO-247 cases can be found on nearly all IR datasheets. Parasitic capacitance plots are usually included in most datasheets of diodes and transistors too, but values are strongly voltage dependent, so the right voltage has to be considered. The problem with most of these plots is that they only include data for the low voltage region, so the rest has to be measured or extrapolated...
By modelling parasitic L, C and R you can know in advance the approximate frequencies at which something is going to ring and the appropriate snubbers may already be included on PCB layout in the first prototype.
Another main difference is body diode. MOSFET have an intrinsic diode that, when forward biased, may store a lot of charge like a standard rectifier, like several uC, particularly on old >100V Vds parts. Recovery process on these older parts is quite delicate, because a too high dV/dt when Vds rises at diode turn-off may result in fatal latch-up, only most newer <=100V devices (and some <=250V) are expected to handle more than 5V/ns reliably.
All newer parts rated at more than 250V still exhibit that behaviour, except one particular family of 600V MOSFET by Infineon (like SPW35N60CFD). Clones by Fairchild are considerably worse, although they look similar on paper. IXYS seems to produce some of that stuff too, but I never liked it, at least on paper, and it's quite expensive.
On the other hand, IGBT doesn't exhibit any diode behaviour when reverse Vce is applied, so they require a diode in all applications involving reverse conduction. Some parts already include an ultrafast or hyperfast diode "co-packaged", on others you are free to choose. When the co-pack IGBTs are break opened, two separate dies are clearly seen (there is usually room for the diode, as an IGBT requires a much smaller die than a MOSFET rated at the same current and voltage.
At blocking voltages of 400V or higher, MOS transistors start to require very big dies and a lot of silicon (expensive) to approach the conduction losses of IGBT, but they don't suffer from current tail problems, except the ones related to spread internal gate resistance, that may be as high as 10, 20 or even 30 ohm for some (not very good) models, but typically 0.5 to 5 ohm for decent stuff.
For example, a few days ago I measured 2.2 ohms on IRFB4227 and 26 ohms for IRFZ48V, but the latter is a bit outdated. Internal gate resistance is only specified on the datasheets of some of the most recent parts. MOSFET with high internal Rg exhibit a current tail too because not all the die switches at the same time (something not documented but measurable). This leads to hard to explain efficiency problems.
An approach for extreme efficiency is to use MOSFET and IGBT in parallel and turn off the IGBT first, then wait a fixed time for current tail extinction, then turn off the MOSFET, but this imposes a delay on switching (100ns to 1us depending on the type of IGBT) not acceptable in all applications (ok for PFC, SMPS and inverters, not for 300Khz audio class D).
Another advantage is lower conduction losses at low currents. For example, I have achieved 97% efficiency on PFCs and 120V sinewave inverters at 1500W that way (with the help of Infineon's 600V MOSFET with fast body diodes and soft-switching magnetic-snubbers too).
And concerning switching power electronics in general, modelling parasitics is very important. For example, film and electrolytic capacitors exhibit approx. 1nH inductance per milimeter of terminal spacing, but you are not likely to see that information anywhere, I had to find it out on the workbench.
This implies that physically big film caps are useless for HF decoupling, but this fact is surprisingly ignored by many designers, resulting in hard to tame ringing <30Mhz (the lower the freq, the harder) that requires several EMI filter stages for propper attenuation before it goes into the outer world.
Parasitic inductance data for TO-220 and TO-247 cases can be found on nearly all IR datasheets. Parasitic capacitance plots are usually included in most datasheets of diodes and transistors too, but values are strongly voltage dependent, so the right voltage has to be considered. The problem with most of these plots is that they only include data for the low voltage region, so the rest has to be measured or extrapolated...
By modelling parasitic L, C and R you can know in advance the approximate frequencies at which something is going to ring and the appropriate snubbers may already be included on PCB layout in the first prototype.
Those were both very informative posts. Fantastic!
So, I've modified my design to a full-bridge and it's doing great at up to 15W at full input voltage on the variac. Haven't moved beyond that yet. I'm watching the Vgs on the FETs and noticed that at a very specific voltage range (80-100Vdc input, 6-7Vdc output), regardless of the load, there's some ringing and noise all the way back to my PWM outputs. It goes away after that though...weird.
I'll look into using the bulbs My output voltage will either be 12 or 24V (I think 24, since that's the current design, although at load it drops down to 19 for some reason...regardless of the current crossing the load in tests so far...weird.
As far as the parasitics, I wish I had my simulation software from school! I have to go back and look at the equations in my texts and see if I can figure this out. If I have a full bridge topology (4 FETs/IGBTs) going into the transformer, output capacitor on the secondary side, where's the best place to put a snubber? Currently I have 4 RC snubbers across Source-Drain on each FET, and I found the values experimentally at low currents...
New questions...
-Does the transformer intrinsically limit current (ie. you CAN'T pull more than a certain amount of current or power out of it), or does it heat up and run away so I have to have some kind of current limiting stage (input PFC?)...right now I have a really simple limiter with resistors on the input line, but that'd be really hard if I want more power on the output ... 20+ft of 24AWG wire which would promptly melt...or 1500ft of 6AWG haha Maybe I'll put a light bulb on the input stage
-In your explanation, you said:
"Recovery process on these older parts is quite delicate, because a too high dV/dt when Vds rises at diode turn-off may result in fatal latch-up, only most newer <=100V devices (and some <=250V) are expected to handle more than 5V/ns reliably."
Since Vds when off is about 340V, my devices probably do this (maybe I'll order the ones you mentioned from Infineon). However, based on my limited understanding, this behavior would show up under all load conditions...Regardless of the current flowing, my FET turn-on and turn-off is the same, and Vds_on and Vds_off are the same. So, if it works in my 50W arrangement, it should stay the same as I get more current flowing across the FETs. As it is, with the voltage step-down across the transformer, even with a couple KW of output and lots of current on the secondary side, I'd pull 5amps through those FETs, which is manageable.
I'm probably missing some important concept that is usually negligible but has an effect in this setup or this range of power.
-Choosing a snubber circuit - I've usually just used RC snubbers, but I'm open to other suggestions. I don't fully understand it all, since, like i said above, I've only ever experimentally found the right ones to maximize noise reduction on the lines I could see (I just got a differential o-scope probe so I can finally watch what's happening on the gates on the MOSFETs). Also, I'm not sure how to actually model the capacitors' inductance...1nH/mm of terminal spacing...the cap terminals? And this "inductor" would be modeled in parallel with the capacitor? have to go back and review all the theory from my circuits text lol
So, I've modified my design to a full-bridge and it's doing great at up to 15W at full input voltage on the variac. Haven't moved beyond that yet. I'm watching the Vgs on the FETs and noticed that at a very specific voltage range (80-100Vdc input, 6-7Vdc output), regardless of the load, there's some ringing and noise all the way back to my PWM outputs. It goes away after that though...weird.
I'll look into using the bulbs
My output voltage will either be 12 or 24V (I think 24, since that's the current design, although at load it drops down to 19 for some reason...regardless of the current crossing the load in tests so far...weird.As far as the parasitics, I wish I had my simulation software from school! I have to go back and look at the equations in my texts and see if I can figure this out. If I have a full bridge topology (4 FETs/IGBTs) going into the transformer, output capacitor on the secondary side, where's the best place to put a snubber? Currently I have 4 RC snubbers across Source-Drain on each FET, and I found the values experimentally at low currents...
New questions...
-Does the transformer intrinsically limit current (ie. you CAN'T pull more than a certain amount of current or power out of it), or does it heat up and run away so I have to have some kind of current limiting stage (input PFC?)...right now I have a really simple limiter with resistors on the input line, but that'd be really hard if I want more power on the output ... 20+ft of 24AWG wire
which would promptly melt...or 1500ft of 6AWG haha Maybe I'll put a light bulb on the input stage -In your explanation, you said:
"Recovery process on these older parts is quite delicate, because a too high dV/dt when Vds rises at diode turn-off may result in fatal latch-up, only most newer <=100V devices (and some <=250V) are expected to handle more than 5V/ns reliably."
Since Vds when off is about 340V, my devices probably do this (maybe I'll order the ones you mentioned from Infineon). However, based on my limited understanding, this behavior would show up under all load conditions...Regardless of the current flowing, my FET turn-on and turn-off is the same, and Vds_on and Vds_off are the same. So, if it works in my 50W arrangement, it should stay the same as I get more current flowing across the FETs. As it is, with the voltage step-down across the transformer, even with a couple KW of output and lots of current on the secondary side, I'd pull 5amps through those FETs, which is manageable.
I'm probably missing some important concept that is usually negligible but has an effect in this setup or this range of power.
-Choosing a snubber circuit - I've usually just used RC snubbers, but I'm open to other suggestions. I don't fully understand it all, since, like i said above, I've only ever experimentally found the right ones to maximize noise reduction on the lines I could see (I just got a differential o-scope probe so I can finally watch what's happening on the gates on the MOSFETs). Also, I'm not sure how to actually model the capacitors' inductance...1nH/mm of terminal spacing...the cap terminals? And this "inductor" would be modeled in parallel with the capacitor?
have to go back and review all the theory from my circuits text lol- Status
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