I am trying to implement average current mode control using a DSP with AD-sampling of the primary current of a push-pull smps.
I have figured out that I can make the inner current loop work by sampling the primary current level just before I cut off the switches, and by knowing the input and output voltages, I can make a good estimation of the average current, and have time enough to calculate the new duty cycle during the 5-10% minimum dead time. One problem is that the AD-converter isn't fast enough to allow continuous sampling, so I have to settle for one sample for short pulse widths, and maybe two samples for the longer pulse widths.
The problem as I see it, is that I cant figure out a way to ensure that I dont walk the core into saturation. Call the mosfets S1 and S2, for each of the primary windings. If I sense a too high current with S1, if I then shorten the duty cycle for S2 directly after, this is the correct thing to do if the core isn't off balance, but if it is, shortening the duty cycle is the opposite of what I want..
Say that I just ignore flux-walking, and impose a limit on my control scheme, that S1 and S2 never may differ more than 1-2% between two switching cycles, how much flux-walk will I then have? Will the core self-reset some of the assymetry during the dead-time, or will I have to solve this in some other way?
I have figured out that I can make the inner current loop work by sampling the primary current level just before I cut off the switches, and by knowing the input and output voltages, I can make a good estimation of the average current, and have time enough to calculate the new duty cycle during the 5-10% minimum dead time. One problem is that the AD-converter isn't fast enough to allow continuous sampling, so I have to settle for one sample for short pulse widths, and maybe two samples for the longer pulse widths.
The problem as I see it, is that I cant figure out a way to ensure that I dont walk the core into saturation. Call the mosfets S1 and S2, for each of the primary windings. If I sense a too high current with S1, if I then shorten the duty cycle for S2 directly after, this is the correct thing to do if the core isn't off balance, but if it is, shortening the duty cycle is the opposite of what I want..
Say that I just ignore flux-walking, and impose a limit on my control scheme, that S1 and S2 never may differ more than 1-2% between two switching cycles, how much flux-walk will I then have? Will the core self-reset some of the assymetry during the dead-time, or will I have to solve this in some other way?
Now I have given it some more thought, will the method below have any chance of working?
I measure the current at the end of each cycle, I1 for the end of S1, and I2 for the end of S2. I only update the control loop at the end of S2, and keep the duty cycle for both switches the same, except for a small variation x, that I add in a separate flux-control loop.
The duty cycle commanded by the control loop is D, and S1 is given (D - x) and S2 is given (D + x). I then have a slow servo-loop with a few hundred Hz in loop-BW which tries to keep the mean flux of the transformer centered. Say that each time I1 is larger than I2, x gets increased with some small amount, and that I also decrease x with an even smaller amount each cycle, to make it self-center in the event of no current imbalance.
I realize that I will get a small amount of hysteretic flux-walking from this scheme, but hopefully it will be possible to keep the transformer centered enought not to cause any problems. Also, the elements that give rise to flux imbalance shouldn't be dynamic, but static parameters (like different parasitics in the transformer windings, different Rds(on) for S1 and S2) that once compensated for will stay that way, and thus are possible to compensate for with a slow loop?
I measure the current at the end of each cycle, I1 for the end of S1, and I2 for the end of S2. I only update the control loop at the end of S2, and keep the duty cycle for both switches the same, except for a small variation x, that I add in a separate flux-control loop.
The duty cycle commanded by the control loop is D, and S1 is given (D - x) and S2 is given (D + x). I then have a slow servo-loop with a few hundred Hz in loop-BW which tries to keep the mean flux of the transformer centered. Say that each time I1 is larger than I2, x gets increased with some small amount, and that I also decrease x with an even smaller amount each cycle, to make it self-center in the event of no current imbalance.
I realize that I will get a small amount of hysteretic flux-walking from this scheme, but hopefully it will be possible to keep the transformer centered enought not to cause any problems. Also, the elements that give rise to flux imbalance shouldn't be dynamic, but static parameters (like different parasitics in the transformer windings, different Rds(on) for S1 and S2) that once compensated for will stay that way, and thus are possible to compensate for with a slow loop?
zilog,
You are trying to control a high frequency process (PWM) with a digital control system that has a sample rate of less than that of the process bandwidth. It can't be done. Think about the frequency content of the currents (Fourier components) and how fast an 'analog' current mode controller is. Sometimes analog IS better than digital, and this is one case where it is
Rick
You are trying to control a high frequency process (PWM) with a digital control system that has a sample rate of less than that of the process bandwidth. It can't be done. Think about the frequency content of the currents (Fourier components) and how fast an 'analog' current mode controller is. Sometimes analog IS better than digital, and this is one case where it is
Rick
sawreyrw said:
I have seen application notes on how to do this for a boost converter, so I know it can be done. The only thing different here is that I have not seen it done with a push-pull converter yet. If I bring the bandwidth of the system down with a slow feedback loop, I think it should be possible?
sawreyrw said:
http://ece-www.colorado.edu/~pwrelect/pubarch/01453091.pdf
Durent steady state, I can assume that keeping D the same will only change the average current slowly, so if I make the current loop only change D slowly, I think it is possible to control it. Now I assume that I wont have such a large load step on the output that the voltage changes too much from cycle from cycle (and thus changes the speed of inductor current downslope).
zilog,
The paper is interesting. I haven't read it in detail, but they are dealing with a different problem than you initially described. What they are doing will work fine because they are not trying to do pulse by pulse peak current limiting (which is what I thought you wanted). Note that the PWM section is analog; the control input to it is derived from a sampled signal.
If you really want average current mode control and protection against flux walking, I would recommend you use an analog PWM controller with peak current limiting 'inside' of the digital current loop. In other words, let the PWM controller take care of current imbalance due to flux walking. The outer current loop could be digital, like in the paper, but is it worthwhile?
Rick
The paper is interesting. I haven't read it in detail, but they are dealing with a different problem than you initially described. What they are doing will work fine because they are not trying to do pulse by pulse peak current limiting (which is what I thought you wanted). Note that the PWM section is analog; the control input to it is derived from a sampled signal.
If you really want average current mode control and protection against flux walking, I would recommend you use an analog PWM controller with peak current limiting 'inside' of the digital current loop. In other words, let the PWM controller take care of current imbalance due to flux walking. The outer current loop could be digital, like in the paper, but is it worthwhile?
Rick
sawreyrw said:
So what you are saying is that I cannot predict the peak current value of the next switch instant from simply knowing the peak current level of the cycle before it? I have seen this done with lower switch frequency (average current mode control of 3-phase inverter that feeds a programmable current onto a 3-phase mains net for solar power conversion) - there the load also is an inductor which is forced to hold a programmable current.
Consider peak current control. You can use the DSP and a PID loop to set the end of cycle threshold, and a DAC and a comparator to tell the end of cycle instant to the DSP.
BTW: For a car-audio amplifier an unregulated supply would work just fine (particularly for class D, where power consumption is very low and an higher internal supply voltage does not result in substantially more heat or power drawn).
BTW: For a car-audio amplifier an unregulated supply would work just fine (particularly for class D, where power consumption is very low and an higher internal supply voltage does not result in substantially more heat or power drawn).
Eva said:
I actually have both a tms320f28016 (which lacks comparators/dac) and a tms320f28027 which has comparators/adc/dac/pwm triggers, which could be used to make a hybrid digital/analog loop.
The thing about using this in a car is just to have a target application, I am also interested in learning how to do other stuff like PV conversion for the grid, 3-phase motor drive or something similar using cheap technology, where I also can use the controller circuit to implement surplus intelligence like user interaction.
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