I have a question to the reason for adding a primary DC blocking capacitor in a ZVT full bridge design.
In Bill Andreycak's paper "Design Review: 500 Watt, 40W_in3 phase shifted ZVT power converter" (http://focus.ti.com/lit/ml/slup102/slup102.pdf) the reason is found on page 4.2: "A dc blocking capacitor is used in series with the primary for this example, primarily because voltage mode operation (duty cycle control) is incorporated."
Why is the blocking capacitor C13 in fig. 2 primarily needed due to voltage mode control ? How about current mode control case ?
According to Dhaval B. Dalal's paper "A 500 kHz multi-output converter with zero voltage swithing", the reason for the cap is "to prevent any net DC voltage from appearing across the transformer and saturating it."
Why would there be a net DC voltage across the transformer in a full bridge design ? Due to non-ideal switching ?
Best regards, Michael
In Bill Andreycak's paper "Design Review: 500 Watt, 40W_in3 phase shifted ZVT power converter" (http://focus.ti.com/lit/ml/slup102/slup102.pdf) the reason is found on page 4.2: "A dc blocking capacitor is used in series with the primary for this example, primarily because voltage mode operation (duty cycle control) is incorporated."
Why is the blocking capacitor C13 in fig. 2 primarily needed due to voltage mode control ? How about current mode control case ?
According to Dhaval B. Dalal's paper "A 500 kHz multi-output converter with zero voltage swithing", the reason for the cap is "to prevent any net DC voltage from appearing across the transformer and saturating it."
Why would there be a net DC voltage across the transformer in a full bridge design ? Due to non-ideal switching ?
Best regards, Michael
I believe the theory was to keep any imbalance between the switch periods from building up a DC bias and "flux walking" up until the transformer saturated. I seem to remember that was a partticular problem on the old push/pull topologies.
And of course I could be wrong so maybe someone else will set the record straight.
Tony
And of course I could be wrong so maybe someone else will set the record straight.
Tony
Main reason is that current never ceases to flow in the primary.
You need one in a voltage mode bridge but you absolutely need one in a zvt bridge.
In a normal hard switch bridge there is dead or off time to allow for some reset. With the zvt bridge the 'off' state is really a free wheeling condition where the top 2 (or bottom 2) fets are shorted. There is no time for self reset and the volt seconds can be imbalanced due to differences in delays, rise times, etc.
Unitrode had horrible app notes and some had errors in them. The 3875 was their first attempt at this chip. The 3895 was better but still had it's short comings.
With current mode no blocking cap is needed but I always put a small gap in the transformer to account for any walking.
You need one in a voltage mode bridge but you absolutely need one in a zvt bridge.
In a normal hard switch bridge there is dead or off time to allow for some reset. With the zvt bridge the 'off' state is really a free wheeling condition where the top 2 (or bottom 2) fets are shorted. There is no time for self reset and the volt seconds can be imbalanced due to differences in delays, rise times, etc.
Unitrode had horrible app notes and some had errors in them. The 3875 was their first attempt at this chip. The 3895 was better but still had it's short comings.
With current mode no blocking cap is needed but I always put a small gap in the transformer to account for any walking.
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