Pulse generator using power MOSFETs

[SAnton]

Hello! My idea is to design 0-5A current and 0-25V voltage pulse generator using MOSFETs in switching mode. Waveform generator (square wave 0-20kHz) drives MOSFETs gates through MOSFET drivers (TC4426=IR4426 inverting buffer, TC4427=IR4427 non-inverting buffer). When the pulse goes from generator (it means logical 1) IR4426`s output is 0, IR4427`s output is 1, so Q2 opens, and vice versa.. FETs are connected with unipolar power supply unit, R3 is the ferrite ring, which must be remagnetized in first half-cycle by current flowing from Q1 to R3-R4 to GND, in second half-cycle from Q2 to R3-R5 to GND.
So, the problem: I can`t get good pulse response, even from the one transistor either Q1 or Q2. There so much unwanted oscillations. Please, pay attention, if it`s not time consuming...
Thanks.

[SAnton]

Oscilloscope images through R3(load). Why are there such oscillations, could anyone explain?

[areza]

how do the GATE waveform looks?

[Fob]

You can not thing for mosfet with load in source as a non saturated bjt. You need more than 35V pulses on gate.

[SAnton]

Gate waveform - square wave. On logical 1 - 15V, on logical 0 - <0.5V.

[areza]

probably the mosfets is staying in linear region most of the time , can you show some oscillogram of gate to source and gate to ground

[SAnton]

Currently I have no images, but oscilloscope images (gate to source) in my experiment showed very good pulse response with 50ns rise and fall times. May be there is a problem with the power supply, maybe these oscillation come from PSU?

[Eva]

Parasitic capacitances and inductances are hidden everywhere and they result in ringing at high frequencies over a few Mhz as soon as you attempt fast switching. Bulding a clean power pulse generator is not easy, layout is critical and so is the way in which parasitics are handled.

Are you using a PCB?

BTW: The common source topology is not recommended unless you want triangle and sine waves too, but anyway, MOSFET working open loop in the linear region that way will result in high distortion (audiophiles tend to love this, though).

[SAnton]

Another problem rised. I used bipolar totem-pole MOSFET switching topology. High-side FET (drain connected with +) easily opens with driver (+15V), but low-side I can`t open (it`s source connected with - of power supply). What the methods of opening low-side MOSFET in such topology?

[Electrone]

Standard practice is to reference the gate drive to the source of the MOSFET. When a MOSFET is to be turned off, an electrical connection is established between the gate and source, usually through a transistor that is turned on.