smps output filter inductor design

[zilog]

I am designing a buck-type output inductor for my smps, and the theory just gives me a headache..

The output current is 20A peak (coupled inductor with 10A in each winding) including the ripple current, and L=50uH. I want as little inductance drop due to saturation as possible (ok, as little as is sensible with an average current mode controller), and I want small physical size. This rules out anything not gapped? normal -26 material has dropped its inductance value by 10% already at H=15 oersteds, which is not many ampere turns for most cores.

I have begun looking at gapped E-cores of 3F3 material (the local shop sells this stuff with 0.35, 0.7 and 1.0mm total gaps), but I dont know what saturation phenomena I will experience in a gapped core. Will the inductance stay more or less the same as long as I dont exceed Bmax for the ferrite material?

Should I design the gapped ferrite inductor with peak B=0.3T in mind and ignore the amount of oersteds (H) I get, since I wont get the same drop in permeability with an air gap as I would get without the gap?

My calculations (however flawed they might be) give me that I need an ETD49 core with 1mm air gap to support 20A/50uH at B=0.33T, is this the smallest available for me?

With these practical problems in mind, is there any reason not to use a much lower output inductor value other than I will punish the output capacitor bank with much higher ripple current, and get the resulting higher output voltage ripple?

[zilog]

I have now done some reading up on the subject. It seems that an Amidon T106-2 core can store all the energy I need and still some, while still dipping almost nothing in inductance.

I want a coupled inductor of 2x50uH with two winding, each carrying 7A DC current, and 4A ripple. The ripple has a fundamental frequency of 106kHz. This is just peak values, at an average only 100W will flow (audio application), so temperature will not be such an issue.

L=50uH, Al = 13.5nH/n^2 => N=61

My calculations give that H(Idc) = 83 Oersteds which is almost nothing according to this diagram: http://www.micrometals.com/images/curves/RFDCMag.gif

The peak AC ripple gives a dB of 96mT, together with the B from the DC current, this produces a peak B of 179 mT, well below saturation even for ferrite, and very low for a distributed airgap iron core.

Have I done the calculations correctly? Am I correct to assume that I can let this core have even higher H, and thus higher inductance at the same current level before I start running into any kind of saturation?

Further more, winding 2x61 turns with a wire size that can handle 2A rms will require more than one layer, is this a big no-no with inductors? How do I wind this in an optimal way? Should I do as with transformers - avoid close proximity between wires with great voltage swing between them? Should I keep the two coupled windings well separated, or wind them bifilar?

Many questions, thankful for any answers.

/Daniel

[switchmodepower]

Ferroxcube has a small writeup on gapped inductor design.

Don't wind the primary and secondary in a bifilar fashion. Figure out how many layers you can tolerate in the window then wind 1 full window and wind PSSP or PSPSP. Tie the primary in parallel and the secondaries in parallel.

The 1 full window winding should be say 4x32 awg or 6x32awg. Use the appropriate wire size for skin depth then use multiple wires for a full winding wind.

The more layers with a wide winding, the better coupling. 50nh leakage is possible using this method.

[zilog]

PSSP? This is not a transformer, does it really apply for an inductor?

[switchmodepower]

Originally posted by zilog
PSSP? This is not a transformer, does it really apply for an inductor?

You said coupled inductor. If you want the lowest leakage, best coupling, and lowest losses this is IMO the best way.

[zilog]

Originally posted by switchmodepower


You said coupled inductor. If you want the lowest leakage, best coupling, and lowest losses this is IMO the best way.

So you say that in case I need 4 parallell windings to carry the current, I should end up with 8 layers of copper, given that the 61 turns per winding I need completely fills all 360 degrees of the toroid?

[switchmodepower]

Originally posted by zilog

So you say that in case I need 4 parallell windings to carry the current, I should end up with 8 layers of copper, given that the 61 turns per winding I need completely fills all 360 degrees of the toroid?

No. It is 4 windings (PSSP) with a total of 4 layers. The parallel WIRES in ONE winding/layer are wound 2 or 3 or 4 wires in hand such that it fills up the BOBBIN. You pick the number of wires/size such that you utilize the bobbin 100%.

This is for a gapped EE core as you described in the first post. If you will use a toroid then this method does not work- bifilar wound is the way to wind the toroid.

61 turns seems like alot for 50uH. What is the application and what is the core?

[zilog]

The application is an output inductor for a dual-voltage push-pull smps, where I need 50uH with quite high current capability. The scenario is described in my second post.