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Old 24th August 2008, 09:46 PM   #1
zilog is offline zilog  Sweden
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Default design of boost converter

I am trying to work out the mathematics for designing a discontinuous boost converter with 8-16V input and 17V/300mA regulated output.

It makes sense that I must limit the duty cycle so that the peak inductor current Ipk has time to fall to zero even for the lowest input voltage, but what happens if the input voltage is high (and the feedback loop commands on-state until the duty-cycle-limit is reached), and my feedback loop temporarily commands a too high duty cycle to adjust the output voltage? The inductor current could easily go continuous here because of insufficient time to let the current fall, and there would be no upper bound on inductor current even in case the feedback loop stays stable despite the RHP zero.

Am I forced to use peak current limiting to be safe, or is there any other way of designing a reliable boost-smps where the input voltage can almost reach the set-point output voltage? Current limiting is not needed for the sake of the load, so I would prefer to avoid spending PCB space/component count on that if not intrinsically needed by the circuit.

I can't find any theoretical references to the case with Vin almost as high as Vout in the literature, so am I just being paranoid here?
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Old 25th August 2008, 12:08 AM   #2
Eva is offline Eva  Spain
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Boost without peak current limiting is not really reliable.

If you don't really want continuous mode, consider operation in the boundary between continuous and discontinuous by detecting when the inductor is empty and the diode stops conducting.

Consider an inverting topology too (flyback).
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Old 25th August 2008, 05:25 AM   #3
zilog is offline zilog  Sweden
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Quote:
Originally posted by Eva
Boost without peak current limiting is not really reliable.

If you don't really want continuous mode, consider operation in the boundary between continuous and discontinuous by detecting when the inductor is empty and the diode stops conducting.

Consider an inverting topology too (flyback).

The circuit is indended to provide the gate drive voltage for my car battery operated smps, and I have a spare PWM channel on the DSP, but peak current limiting takes an extra comparator/interface logic. Is there any other way of producing the needed 17V to drive 4 mosfet gates in a cheap fashion? An extra winding on the big push-pull transformer doesnt feel that great since I want to be able to have large input voltage swing which would require linearly dropping maybe 32-35V down to 17V in the low-to-medium load situation.

I will have an AD-channel sample the battery voltage at a few tens of kHz, would it be reliable enough to use the battery voltage as an indication of how fast the boost inductor will reach Ipk?
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Old 25th August 2008, 10:20 AM   #4
Eva is offline Eva  Spain
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You could avoid the current limiting if you had two free ADC channels to sense input and output voltages.

For example, in one circuit I'm using a PIC to boost 12V to 24V (and other tasks) with no current limting. The code forces discontinuous mode by knowing inductor value, input voltage and output voltage, and adjusting timing properly.
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Old 25th August 2008, 11:49 AM   #5
zilog is offline zilog  Sweden
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You dont happen to have any hints on a cheap mosfet driver, or mosfet with integrated driver for this current level that can be driven from a 3.3V/4mA logic output? Right now I am leaning towards using a driver-IC together with a power mosfet, as is the usual method. I will probably drive the thing at 53 or 26.5kHz as that is the frequency the rest of the smps will use.
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Old 25th August 2008, 02:16 PM   #6
Eva is offline Eva  Spain
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You don't need a driver IC. Check these out:

http://www.fairchildsemi.com/sitesea...itemap+id&ia=1

Rds-on is already low at 3.3V and the diode comes in the same package too.
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Old 25th August 2008, 04:03 PM   #7
zilog is offline zilog  Sweden
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Quote:
Originally posted by Eva
You don't need a driver IC. Check these out:

http://www.fairchildsemi.com/sitesea...itemap+id&ia=1

Rds-on is already low at 3.3V and the diode comes in the same package too.
At 4mA output drive capability and a battery voltage of 16V, I will have a maximal Vgs-capacitance of (16/3)*63 + 299 pF = 635pF for 16V input with the FDFS6N754 (which is the best of the SO-8 models). This will take 500ns to switch on/off, isnt that a bit high?
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Old 25th August 2008, 05:33 PM   #8
Eva is offline Eva  Spain
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How much current are you going to switch?
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Old 25th August 2008, 05:49 PM   #9
zilog is offline zilog  Sweden
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Quote:
Originally posted by Eva
How much current are you going to switch?

Probably just 300mA@17V output, as long as one S0-8 capsule can take the heat, that's all the efficiency I need.

The 300mA is just an estimate of what it takes to drive one push-pull with xfmr-coupled gate drive, and one push-pull with direct-driven mosfets at 53kHz.
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Old 25th August 2008, 08:03 PM   #10
zilog is offline zilog  Sweden
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I have worked my way through the theory now, and have gotten some values:

Vin [8,16]V
Vo = 17.7V (17V output +0.7V diode drop)
Io = 390mA (300mA with margin for efficiency loss)
T = 1/26500 = 37.7uS

With 30% dead time margin, this gives Dmax = 0.3836 which gives L = 47uH (Ipk = 2A), output capacitor = 150uF@300mA rms ripple rating.

The transistor I have selected (locally available) is IRF7341. Are these values reasonable? Can I use the body diode from one of the transistors in the so8-capsule as the boost diode, or will I sacrifice too much performance doing that?
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