Correct gate drive waveform ?

[alexclaire]

Hi everyone,

I'm planning to build a 300W half bridge smps:

Specifications:

input : 230V AC 50Hz
output : +- 30V 5A
ETD 39 core (or 50mm toroid core)
FET (IRF 730) switching @ 50kHz
TL494 controller (12V supply)
1:1:1 gate drive transformer

I would like to know if these waveforms (gate drive transformer) are ok.

advices are welcome !!

gate drive transformer core is about 26mm X 19mm X 5mm
Ac = 0,228 cm2
Np=Ns1=Ns2=22 turns
Bmax around 120mT

Thanks.
transformer driver schematics

 

[alexclaire]

secondary gate drive x former waveforms...

just wondering what is this peak (13V) on the top of the waveform
and if the voltage falling down to 8V is enough to achieve low Rdson when driving fets...

 

[alexclaire]

control board pic with gate drive transformer

 

[Electrone]

I am not the best with transformers. But I recognize it as flyback.

The explanation is that when the drive was low and then went into grounded mode, the magnetic field in the core was persisting. When the drive went to high, the clamping action ceases and the voltage can flyback during the collapse of the magnetic field.

The voltage level on the winding drops down to the power supply level once the magnetic field has collapsed. Then the power supply holds it at the lower level and builds up the magnetic field in the opposite direction as current level in the winding increases in a quite linear manner.

 

[Electrone]

One important thing is that the waveform looks like it is not problematic according to my judgment. I think it is fine. I was hoping to imply that opinion in my previous post.

 

[switchmodepower]

What does the wave shape look on the emitters of the transistors and what does it look like across the primary winding?
If it is overshoot you can return some of the energy back to the bus with diodes.

 

[alexclaire]

across the emitters the signal is a perfect 0-12V rectangular waveform,but across primary the signal is the same as secondary with a kind of distorsion at the top (not a flat line but no oscillation)

ps : added diodes to the bus and ground now the signal is better : always under vcc...

 

[alexclaire]

maybe the magnetizing current ramps a bit too high (that's why i got a voltage decrease) gonna add a few turns to increase primary L...

 

[Bakmeel]

Try loading your gate driver with a 5nF capacitor to simulate the mosfet gate. It will tell you the behaviour when you run it with an SMPS. I think the waveform is like this because there is no load on the secondary.

 

[alexclaire]

here is the behaviour with 4.7 nF load :

12 V peak and then fall to 9 V

will this be enough to drive fet safely ?

 

[Bakmeel]

Yes. It should be.

You can check in the mosfet datasheet for the gate threshold voltage (Vgs). If you remain substantially above that voltage, you will have sufficient "saturation" to guarantee low Rds-on

 

[areza]

may be a low impedance totem pole output for the transformer is better, not sure but scope trace may be caused by leakage inductance , i guess the primary must be shorted to ground through totem pole in dead time so the core get reset, why not try SG3525 can be use with gate xfo with out a totem pole,