UC3846 current mode control vs. SG3525 with average current mode control

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Hi all,

I am not familiar with SG3525 but I noticed that is used in a lot of designs and is quite cheap and easy to find.
I want to use it for a 1kW full bridge power supply and I want to avoid AC coupling of transformer due to size and cost of series capacitor(s). The usual choice is to use a current mode control PWM chip like UC3846 where sensed current is directly compared with output signal of Voltage Error Amplifier. The pulse by pulse current limiting is achieved by considering (correct me if I'm wrong) that voltage error signal does not change for two successive "ON" states.

My question is: Can average current mode control implementation avoid transformer saturation in a similar manner?
(sensed current is integrated, average value beeing considered as constant for two successive commutations ...) See attachment.

The internal error amplifier of SG3525 is going to be used as a follower.

I'm wainting for your thoughts ...
 

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  • sg3525_with_acmc.jpg
    sg3525_with_acmc.jpg
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re: 1 kW full bridge smps

I remember the SG3525 being *voltage mode control*, or "VMC", aka "direct duty cycle control". The 3525 is not current mode, neither peak nor average.

Regarding the use of VMC, a series cap is required to balance any volt-second asymmetry and prevent core saturation due to flux staircasing. If the SG3525 is used, a cap is needed. With *peak* current mode control, PCMC, a cap is not needed. In PCMC, the error signal sets the peak current and the duty cycle is indirectly controlled. The inner control loop which sets peak current prevents staircasing.

With average CMC, "ACMC", however, the peak of the current waveform can enter saturation, because the inner control loop is forced by the outer loop which controls the voltage, to regulate a specific *average* value of current. Thus, the average could be correct, but the peak enters saturation. Some ACMC control IC chips have a "volt-second" control feature to avoid this condition. If such a feature is not available, then a series cap would be a good safeguard against staircasing.

I hope this helps.
 
Sg3525 is a very cheap IC and I can buy dozens at corner street store.
The SG3525 "disadvantage" is that the error signal (output of internal opamp) is compared with oscillator ramp which has nothing to do with circuit conditions (i.e. sensed current). So, as already has ben told, it is a voltage mode control chip.
My thought was to include somehow in feedback loop the sensed current information in an attempt to prevent any possible flux imbalance in transformer core. This way I start thinking to conductance control.

UC3846 generates the PWM signal by comparing the sensed current ramp with the error signal from opamp output, so it is a current mode control IC.
The drawback is that I can't find it at local stores. I have to buy it online and the usual delivery time is round 2-4 weeks . Don't ask me why .
:confused:

The idea behind is to use cheap an easy to find components.

Regards,
Florin
 
Hi Florin,
I wish to be more detailed, but I don’t have much time now. Second, my English is more WINglish than natural language. Third, I often communicate in “words” instead sentences (by RS485).
So, I will explain my circuit briefly, because I did not find yet how to reduce the size of image.
I am using SG3525 with two complementary bjt drivers for gate transformer. Topology is full bridge with free wheeling transformer during of time (not zvs). The main xformer is center tappet and rectifier is with two diodes. Each leg has current sense transformer with reset, because the duty of current exceeds 50%. They form signal to current amplifier. The CA output is “ramped” with current slope of the inductor.
So if signal from voltage amplifier is limited, the output peak current will be limited too when we approach some average output current. I am using this to charge battery. My power supply is a kind of 27V/30A DC UPS.

In acmfb.pdf I use resistor and opa to sense the inductor current. I am so proud to find how to ground output capacitor when using low side sense resistor. The INV input can not be negative, because the NI input is grounded.
 
One possible way to get rid of transformer imbalance, while keeping the easy and precise current limiting provided by average-current-mode and using no coupling capacitor, may be to add a third inner peak-current loop whose limit is just set by the output of the current amplifier. I have never tried this, though.

The voltage and average-current loops could be located in the secondary side, and the peak-current loop in the promary side. I'll try it some day.

BTW: I did most of my experimentation with average-current-mode and primary-side sensing with current waveform downslope synthesis. It wasn't performing as good as I like.
 
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