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Old 19th December 2011, 04:23 PM   #281
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Quote:
Originally Posted by AndrewT View Post
I think someone will have to help me through understanding the message therein.
From low to high frequency capacitors have three behavioral regions---the capacitive region where their impedance falls as 1/f, the resistive region where the 1/f from capacitance and j * w * ESL is less than the ESR, and the inductive region where the impedance rises linearly from frequency due to the ESL. The phase in these three regions is -90, 0, and 90 degrees, respectively, and the width of the resistive region is determined by the ESR. With low ESR caps like MLCCs the resistive region is of negligible width, which is why you see the supply impedance sawtooth in the app note Tom linked---those dips at the "bottom" of the "teeth" are the capacitor's self resonance between their C and ESL. The downward slopes of the sawtooths are where the capacitive region of one of the caps is dominating the supply impedance and the upward slopes are where an inductive region is dominant. The corrolary of this is the supply phase swings from -90 to +90 and back as a function of frequency.

The deal with MLCCs versus tantalum is choosing tantalum usually adds enough ESR to hide the sawtooth, producing a supply with a phase that's more consistently around 0 degrees. But adding ESR to hide the sawtooth means the supply impedance is increased.

If one wants to get a feel for this, a good exercise is to calculate a few caps' individual impedance curves and then put them in parallel to see how different selections affect the supply impedance and phase. You can also grab National Semiconductor, er, TI's, Webench tool and look at what happens with one of their buck regulators as the selection of the output L and C is varied. For low output ripple you want low a ESR cap. But that means moving the ESR to the inductor in order to maintain the regulator's phase margin, decreasing the supply's efficiency. The physics of paralleling bypass caps are essentially the same. Only either you don't have a regulator or are looking at frequencies above the regulator's loop bandwidth.

Quote:
Originally Posted by magnoman View Post
I believe these parallel resistors are modeling skin effect losses (there is also a series R, at least in the figures I saw).
Hmm, thought the one I was looking at was R || L + R || L + L but didn't zoom in to double check on the rendering. It's of no great importance---and if it is an L it occurs to me it's entirely possible the inductor model includes an ESR term.
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Old 19th December 2011, 05:12 PM   #282
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A point I haven't seen mentioned is regulator output impedance. Regulators are closed-loop devices, so one wonders how well they might react to low-resistance capacitors on their outputs.

For example, a 7915's Zout rises from 0.01 ohms at low frequencies to 0.1 ohms at 100 kHz, which can be modeled as a 0.01 resistor in series (ESR) with a 160 nH inductor. Electrolytics tend to have ESRs not far from 100 milliohms, so the resonance will be well damped, but the usual 0.1 uF people place in parallel with electrolytics has low ESR (~0.01 ohms), possibly resonating nicely with the regulator ESL. How would this affect phase margins in the regulator control loop?
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Old 19th December 2011, 06:17 PM   #283
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Same as any other Miller compenated voltage feedback amplifier; main difference in applying the stuff Tom linked is you don't usually find regulators' GBP in the datasheet. I have the impression it's generally a few MHz. But I've never actually measured it.

ESRs of liquid electrolytic caps tend to be between 20 milliohms and a few ohms. The smaller the cap, the higher it is. Typically I look at datasheets for caps which are speced for ESR, such as Nichicon's HE series, and then estimate the ESR of caps not speced via their ripple current ratings. Polymer electrolytics are usually between 5 and 40 milliohms. Most aren't speced for ESL (and ESL meters with nH resolution are pricey) but one can usually make a resonable guess based on the package and the applications the manufacturer suggests for the parts.

Plug the above into Spice or whatnot, run a parameter sweep, and one should have first order answers for one's design---ESR and ESR are both frequency dependent but that's a second order effect.
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Old 19th December 2011, 08:25 PM   #284
Elvee is offline Elvee  Belgium
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Quote:
Originally Posted by DSP_Geek View Post
How would this affect phase margins in the regulator control loop?
Most regulators don't like it: with its output left unbypassed, any 78xx type regulator can be stable without a decent input decoupling.
As soon as you use an output cap, it becomes more demanding on the input cap.

For LDO's, the situation is worse: if the output cap has a too high Q, it will be unstable, no matter what you do. That's the case with most high performance regulators, unless they use exotic compensation schemes.

Quote:
ESRs of liquid electrolytic caps tend to be between 20 milliohms and a few ohms. The smaller the cap, the higher it is. Typically I look at datasheets for caps which are speced for ESR, such as Nichicon's HE series, and then estimate the ESR of caps not speced via their ripple current ratings. Polymer electrolytics are usually between 5 and 40 milliohms. Most aren't speced for ESL (and ESL meters with nH resolution are pricey) but one can usually make a resonable guess based on the package and the applications the manufacturer suggests for the parts.

Plug the above into Spice or whatnot, run a parameter sweep, and one should have first order answers for one's design---ESR and ESR are both frequency dependent but that's a second order effect.
That is a slippery slope: ESR is just that ESR, that is a synthetic parameter, equivalent to tan δ at some frequency; it is not the same as a physical resistance.
It becomes more or less equal to the physical (ohmic) resistance at the resonance and higher (but not too high) frequencies, but if it is specified at low frequencies, like 100 or 120hz, or even 1KHz, it will be significantly higher, because it is more or less a proportion of the reactance at any frequency.
Such confusions can lead to significant errors when assessing the effect of capacitors in a given configuration.
The confusion is reinforced by the fact that so-called "ESR-meters" measure the module of the impedance at some (generally high) given frequency.
The reality can be quite different.
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Old 19th December 2011, 09:36 PM   #285
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Most 'lytics I look at are specified at 100kHz. Good enough for first order approximation. Would be interesting to know what lines are specified at lower frequencies.

Post 282's about standard regulators, but most LDOs I end up looking at are stable to 0 ESR---Micrel and National/TI have numerous offerings and Analog Devices has some nice parts as well. Though, granted, it's been a while since I specified output cap type = tantalum on a parameteric search for regulator.
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Old 20th December 2011, 02:39 AM   #286
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The United Chemi-Con EKMH and ESMH aluminum electrolytics have ESR specified at 120 Hz, in the Mouser catalog I'm perusing. And the Cornell Dubilier MLP and MLS flatpack aluminum electrolytics have ESR specified at both 120 Hz and 20 kHz, for 25 degC, while some of their big screw-terminal cans are spec'd at 120 Hz only. It looks like a lot of the larger snap-in and screw-mounted ones are spec'd at 120 Hz, maybe because they are typically used as smoothing caps in linear supplies.

This Cornell Dubilier Electronics Java Applet tells it all, very nicely, at least for their large-ish electrolytics. It also will generate a nice frequency and temperature dependent spice model, for you, automagically! I believe I discussed how to most-conveniently use those models with LTspice, way (way) earlier in this thread. Just click on the little "Impedance Modeler" link at the top, once you get there.

Now I see why some people put their electrolytics where they'll get heated by the heatsink. They have lower ESR and higher capacitance at higher temps.

Last edited by gootee; 20th December 2011 at 02:56 AM.
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Old 20th December 2011, 03:13 AM   #287
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I find the practice of putting a low ESR 0.1uF cap in paralell to a high cap electrolytic cap quite useless. You either get a highisch Q resonanz (if you are careless and dont pay attention to the resulting Q of the circuit) or you add a resistor in series in wich case the cap wont contribute much current anyway. So what is the point of this practice?
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Old 20th December 2011, 03:25 AM   #288
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Quote:
Originally Posted by gorgon53 View Post
I find the practice of putting a low ESR 0.1uF cap in paralell to a high cap electrolytic cap quite useless. You either get a highisch Q resonanz (if you are careless and dont pay attention to the resulting Q of the circuit) or you add a resistor in series in wich case the cap wont contribute much current anyway. So what is the point of this practice?
Good call.

If you read the earlier part of this thread, I think you'll see that it was agreed that it is a bad idea to indiscriminately parallel a large electrolytic with a small-value low-esr cap, especially if they are not at the point of load.

But sometimes they might both be needed for decoupling close to power pins of chips, for example, because of the power rail inductance (and ESR) and the need to supply transient current demands (without disturbing the rail voltage too much), and, for amplifiers, also to prevent high-frequencies from finding a feedback path through the power rails and causing instability. So there might be a small-value cap right at the power pins while a large-ish electrolytic is technically "in parallel" but is separated from the small cap by power/ground rails' impedance. In that case, the designer needs to perform some type of impedance analysis and choose the values and types of the caps to ensure that no unwanted resonances will be created.

Last edited by gootee; 20th December 2011 at 03:34 AM.
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Old 20th December 2011, 05:45 AM   #289
benb is offline benb  United States
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Quote:
Originally Posted by gorgon53 View Post
I find the practice of putting a low ESR 0.1uF cap in paralell to a high cap electrolytic cap quite useless. You either get a highisch Q resonanz (if you are careless and dont pay attention to the resulting Q of the circuit) or you add a resistor in series in wich case the cap wont contribute much current anyway. So what is the point of this practice?
You're right, either way can have problems. I have a simple answer, you do both. You put a 0.1 uF right at the power pins of a chip or whatever's going to suck up the power, and you also put a series connection of a 0.1uF and a 1 ohm resistor across the rails near the first 0.1 uF cap. This gives a low-impedance resistive path that damps out ringing from wiring inductance resonating with the first cap.

There's the book "High Speed Digital Design" with a subtitle of "black magic." Much or most of it is about PCB design for digital circuits, layout and signal measurement. The title seems a little ironic, as the "digital signals" are treated and analyzed as (among other things) analog transients going through R/C circuits. It's got a chapter or two on power rail bypassing, and talks about adding a cap with a resistor in series IN ADDITION TO the usual 10uF near the power entrance and a 0.1uF right at the power and ground pins of each chip.. There's some formula related to power rail and ground track length/inductance that calculates the "optimum" resistor value, but it tends to be within an order of magnitude of 1 ohm.
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Old 20th December 2011, 06:17 AM   #290
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Benb

I have also found similar results. The RC acts as a snubber (if you can measure the ringing frequency then you can just add enough capacitance to start decreasing the frequency, or preferably halve it, then a series R of the same resonant impedance value).
To tie this back to the power plane issue you still need a low inductance connection to the pure C and so the power planes again allow these RC's to be located some distance away and still be effective.

Thanks
-Antonio
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