USB -> I2S and Analogue

[Redshift187]

I've designed a very simple board around the PCM2706 IC, with analogue output (so I can use it now and hopefully remove some of the hum/noise I get from my PCs) and I2S for connection to a TDA1541A DAC I'll be making at some point in the future.

The overall footprint is slightly less than 5cm x 5cm (2" x 2"). I know it's customary to put SMD parts on one side and through hole on the other, but pretty much everything will go on the top side because I will mount this as a daughter-board to my future DAC via pins in the 3 isolated holes plus the I2S header. The mute and volume buttons are momentary push buttons I salvaged from an old car CD player faceplate.

I've designed this to be cheap. It'll cost me about $50 to make two (I got the DAC chips free as samples). All I hope to get from it is less noise than the onboard sound cards of my PCs. As such, no major design changes will be entertained at this point.

[marce]

Ground planes, those skinny ground tracks aint gonna help with noise. Seperate the digital and analogue sections, ie make sure no digital tracks go near the analogue tracks and visa verso, and try and get as much ground pour on top and bottom layers with plenty of gnd vias joining the layers, one plane.
USB d- and d+ are differential signals and best routed as a differential pair.
You have numerous traces coming out of single SMD pads and numerous acid traps, that could do with tidying up.
Capacitors for crytals want moving and routes tidying up and being direct through the caps and resistor, with a gnd guard ring around these routes.
And the power supply routes could do with thickening up a bit.

[marce]

USB guidlines:
http://www.smsc.com/media/Downloads/...tes/an1517.pdf
http://www.cypress.com/?docID=32407

A bit on acid traps:
What is meant by Acid Trap? - Cadence Community
There is another reason to avoid them, not a widely detailed, but whn the manufacturer applies etch compensation to the artwork, these narrow areas can become filled with copper and wont etch out, causing an enlarged pad and possibly other problems, a neat and tidy design is always prefferable.

[marce]

A little picture showing traces exiting SMD pads as an example.

[Redshift187]

Thanks for the advice Marce, looks like I have more work ahead. Obviously my first SMD design.

[Redshift187]

Here are my changes. I changed the USB connector from a mini B to a B for the more flexible pin arrangement. I moved the LED to the SSPND pin for more information, I lowered some of the capacitance since I had too much for a bus powered application, plus tried to take most of the advice given by Marce.

[Redshift187]

Oops, ignore that large space without fill under the USB. I moved the connector in and forgot to move the restrict I made around the data lines.

[marce]

Much better and neater.
Could do with more vias between gnd, will reply more in detail later

[marce]

Try and get some GND pour between C2 pad and R11, just in case. I have seen traces near clock traces suffer from crosstalk, which can be interesting especialy on a reset pin

[Redshift187]

No schematic changes this time.