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Old 24th March 2007, 02:10 AM   #1
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Cool AlephJ-X

Hi,

after thinking about this for some weeks Iīve changed one of my Aleph-X monos to a Jfet input. (To see (hear) what all the fuss was about)

Iīve used a pair of matched 2SJ74 (Idss about 10,5mA) cascoded with a pair of matched 2SJ103 (Idss about 11mA).

The 2SJ74 are connected to the current source with one 100 Ohm trimpot so they have about 50 ohms source resistance and dc offset can be adjusted.

I changed the drain resistors to 680 Ohms from 390 and the current source bias from 20mA to around 11mA.

No other changes were made.

Well the good thing about this is that it works, dc offset is near zero and the absolute offset starts quite low. I didnīt change the McMillan resistors (10k) wich probably isnīt quite right but I have to think about this a bit (suggestions are welcome).

The problem is that at the moment the bias probably is too low to drive the 3 output fets per side.
At 2Volts the bandwidth is about 83kHz (8 Ohms) and 71kHz (4 Ohms)
This changes to 63kHz and 45kHz at 10 Volts
and 33kHz and 20kHz at 20 Volts output

I did expect something like this but not as dramatically. Before the change the bandwidth was 142kHz (8 Ohms) and 126kHz (4 Ohms)

Any ideas if something else could be the cause for this behaviour?


William

P.S. I didnīt listen to it yet and as long as thereīs only one Iīm not shure I can say something usefull about the sound. Before I modify the second amp I would like to see if I can raise the bandwidth (without disconnecting some output fets!)
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Old 24th March 2007, 02:26 AM   #2
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Cool!

Why don't you cascode with mosfets and put the current through the differential pair back to 20 mA or so?

The jfets should be able to take that current when cascoded w/mosfets no problem--I did it with my BOSOZ at 20mA per side (there are two CCS in BOSOZ, if your not familiar with it) with no problems at all.

Even though the gates of the output devices have high input impedence, they do require some current. Sounds like the 5.5 ma per side is not enough to drive the gates.

JJ
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Old 24th March 2007, 03:11 AM   #3
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Default Re: AlephJ-X

Quote:
Originally posted by wuffwaff


. . . and the current source bias from 20mA to around 11mA.

As JJ indicates, you can keep the higher bias current.
For example, I'm using 2SJ108GR (Idss clasification, -2.6mA~
-6.5mA) for my Babo Zen. But, it handles 12mA of bias current
without any prblem. I had another test and found that
it could handle even 16mA. This much of bias was not possible
simply by the self-biasing. It was, however, possible together with
current source because, in this case, the jfet acted as a simple
resistor.

Hope this info will be useful . . .


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Old 24th March 2007, 03:55 AM   #4
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Default Re: Re: AlephJ-X

Quote:
Originally posted by Babowana



As JJ indicates, you can keep the higher bias current.
For example, I'm using 2SJ108GR (Idss clasification, -2.6mA~
-6.5mA) for my Babo Zen. But, it handles 12mA of bias current
without any prblem. I had another test and found that
it could handle even 16mA. This much of bias was not possible
simply by the self-biasing. It was, however, possible together with
current source because, in this case, the jfet acted as a simple
resistor.

Hope this info will be useful . . .



Indeed...but aren't you driving the Gate negative?

Grey
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Old 24th March 2007, 05:36 AM   #5
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Hi Grey,

You could find the answer to your question from the attached
sketch. Iwill post pdf also on my thread.


Attached Images
File Type: jpg babo zen jfet tests.jpg (76.1 KB, 3023 views)
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Old 24th March 2007, 06:28 AM   #6
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William,

What is observed is not unexpected.

A JFET has much lower transconductance at about 30mS. On top of that you have put in about 50 ohm source degeneration. So you open loop gain for the first stage drop from say 25 to 8.5. On top of that, you are using a cascode (2SJ103) which has almost identical Idss to the driver (2SJ108), so that you are not getting much Vds across the diff pair (I doubt if you get much more than 1V).

And you would expect the open loop bandwidth of the second stage to almost half, especially in a high power AX where you have many power FETs in parallel, since you increase the signal source resistance (which is essentially determined by the drain resistor of the diff pair) by a factor of 2.

And since you are already operating at or near Idss, you are asking your JFETs (both the driver and the cascode) a lot to swing 2x bias, especially the cascode which has much large change in Vgs and hence would essentially switch off your driver JFET by making its Vds near zero.

So what to do ?

I would suggest changing the bias to around 5mA and the drain resistor to 910k to start with. Change the source trimpot to 10R which is sufficient to balance currents. You get the JFETs back to a decent working point, and get the gain back up. The open loop bandwidth of the 2nd stage is a problem, but you now also have more negative feedback, which should help. And this is quick enough to try.

If you still want to run at 20mA and use 390R drain resistor, then just put 3 pairs JFETs in parallel and bias each at 7mA. You should use FETs then with Idss no less than 12mA. This will get you back the bandwidth for the second stage. The first stage is now of course 3 time lower in bandwidth, but then a 2SK108 has much lower capacitance to start with compared to a IRF9610. Anything in between is a balancing act between first and second stage. The combinations are endless. You can even add a driver (source follower with IRF610 / 120 ohm) between the diff pair and the IRFP240s to get you even higher bandwidth than before.

And I would use MOSFETs as cascode with Vgs 9.1V to give a decent 5 to 7V Vds to the diff pair, if I were you. Or you use selected J174s as cascode (one for each 2SJ108).

Just my 2 cent.


Patrick

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Old 24th March 2007, 08:41 AM   #7
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Hi,

thanks for your replies.

Jupiterjune, Babowana:

How can I bias a JFet with an Idss of 11mA with 15mA? I would have to bias the gate negative and this would cause a 0,7V wide flat spot.

Patrick,

thanks for the answer!

The 50R source resistors are there because I couldnīt get a 25R or 50R trimpot yesterday

1V across the diff pair is about right (but Iīm using SJ74, not SJ108)

Bias was chosen around 5.7mA per JFet. Since Idss is around 10 this would give a 4mA swing. Do you suggest 5mA in total or per side? With 910R this would give 0,025 x 910 =2,27V wich is not enough, I need around 3,9V to get the absolute offset right.

I put the cascodes in because first I wanted to try it in my (32V) Aleph5. This uses 3 Fets and needs only around 3mA of current swing at 100 kHz (measured). With these cascodes I could just plug the diff stage in without making bigger changes to the circuit.


OK,

I will try to get a 10R trimmer today and throw out the cascodes (they are not needed in my Aleph-x) Then see what happens.

I donīt want to make the input stage too complicated as the amps are sounding very nice at the moment (with IRF9610) and this was just an experiment.........


William
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Old 24th March 2007, 09:07 AM   #8
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Quote:
Originally posted by wuffwaff


How can I bias a JFet with an Idss of 11mA with 15mA?

2SJ74 is big enuf to be the diff input pair.
And, the CCS can be any kind.
Choky's Babbelfish is an excellent example.
Babbel fish has TR CCS.

I could use the A-X MOSFET CCS as it is. Why not?

I'm sure that the sound with 2SJ74 diff input will
be different in positive way ^^.


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Old 24th March 2007, 09:51 AM   #9
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wouldnt the loveltec jfets give the required current to drive the output stage?
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Old 24th March 2007, 09:53 AM   #10
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> Bias was chosen around 5.7mA per JFet.

Sorry. I misread it as 11mA per JFET. 5.7mA is fine.

> With these cascodes I could just plug the diff stage in without making bigger changes to the circuit.

I would leave the cascode in. John Curl was right in saying that you don't want to operate Toshiba JFETs such as 2SJ74 too close to their max allowable Vds. I think your 100W AX would put something like 20V on them ?

Just that you should not use 2SJ103 as cascode. If you look at Borbely's circuits, though he uses 2SJ103, he was using 2.8mA bias. Also he has a lot of open loop gain, which means you swing very little current. Try J174 if you wish to cascode with JFET. Or just use no cascode, as you already planned.

If you have well matched 2SJ74s, I would throw out the trimpot altogether.


Patrick


PS I have never tried Loveltechs at such low current (10mA). So I do not know if you can find a linear loadline at 10mA. Also you will fins that Loveltechs has much higher capacitances, even when cascoded.


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