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Old 20th September 2006, 07:21 AM   #51
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Quote:
Originally posted by Rob Dingen
Hi Cheff

I'm very intrested would you post it.
Looks very nice.

Thanks
Rob
Hi Rob,

Well, I'll need a little time to clean up drawings and check all.
A week or two, I think, but I'll post it.
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Old 20th September 2006, 07:28 AM   #52
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Quote:
Originally posted by courage
Hello Cheff,

Nice work, very impressive. Hats off.

Simulation figures look good. To what extend do they correlate with real measured figures?

Regards.
Hi courage,

Thanks for kind words

Well, difficult to say.
1) Sims use models, and to what extent models are faithful....
2) I do not have pro measurement gear... The only measurements
were preformed using a PC soundcard And softwares used
give little differences in results

Nevertheless, you'll find some figures in this thread
If I remember correctly, when measuring THD with a PC, H2 was -80dB
and H3 even less...
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Old 26th September 2006, 02:14 AM   #53
spencer is offline spencer  Hong Kong
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Cheff,

I have tried out in a board on your UGS ver3 circuit - current mirror and the dc bias and offset is very stable. Output offset is within +/-0.5mV for both balance and single end output to ground. The K389 and J109 current is at about 2.9mA and the last output bjt mirror is at 5.8mA which is very stable from power on till 30 mins warmup.

BJT to use are : 2SA970GR / 2SC2240GR with gain 220 / 250 on average. I did not match them closely as I know the batch is within +/- 20 in hfe.

Idss for K389BL is 6.5mA while J109GR is at 6.2mA. This is the reason that I get only 2.9mA bias current per fet and is very close to your estimation and simulation.

This is just a evaluation board for me and I am yet to test the output and input offset, frequency response using my sig gen and scope. Sorry I have no distortion meter!

By the way, where you get your sound card and software for distortion measurement and can I know what is the cost of hardware and software in total?

Regards,
Spencer
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Old 26th September 2006, 07:43 AM   #54
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Quote:
Originally posted by spencer

This is just a evaluation board for me and I am yet to test the output and input offset, frequency response using my sig gen and scope. Sorry I have no distortion meter!

[/B]

Hi, I'm lurking in the background and can't wait for more measurementsd and sound impressions.
Could I get by with BC550/560 replacing the zetex parts?
Rüdiger
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Old 26th September 2006, 07:58 AM   #55
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Hi Spencer,

Very nice job. Congrats !

BTW, you must be one a the few that were bold enough to mount
dual jFets on perf boards. Kudos !

Glad you could achieve such good offset figures without any problems
Did you see any variations in offset with temperature ? Without
heatsinking, it was wandering a bit too much for my taste, but as
your bias is a little lower than mine, may be the heatsinking is not
that necessary.
Speaking of your lower bias, I do not think it will raise problems
(both in distortion and clipping limit) at normal listening levels

Please post your measurement results for bandwidth, I do not have a
proper sig gen for measuring it. And test it on square waves, just to
see if you have overshoot on transitions. It's quite implementation
dependent, so don't be disappointed if you see nothing

The software I use is RMAA (Right Mark Audio Analyzer), freely avalaible
at http://www.rightmark.org . My sound card is a mere and cheap SB
Live 5.1, with nothing fancy. I'm totally new at using this software, so I
must dig a little to get more accurate results.

So keep it up, and when your finished with tests, please post your
listening impressions

Again, great job
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Old 26th September 2006, 08:22 AM   #56
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Quote:
Originally posted by Onvinyl
Could I get by with BC550/560 replacing the zetex parts?
Rüdiger [/B]
No problemo
The "historical" reason for using zetex parts was their form factor
which allowed a more efficient thermal coupling with my "heatsinks",
and their thickness that is close to the Toshiba's.
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Old 26th September 2006, 02:06 PM   #57
spencer is offline spencer  Hong Kong
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Cheff,

I use 47k for Rfb and 10k for Rin and supply voltage about +/-22.7V

I have some measurement result as below:

1. Gain: SE to SE is 2 times with the other input shorted to ground. If the other input is not grounded, the gain is 1.
SE to BAL gain is 4 times with one input grounded.
Bal to Bal gain is also 4 times.

2. Freq response: This is more difficult to measure as I dont have bal input in my scope but I use a audio transformer to couple the sig gen as a bal input to the UGS. -3db is at about 1MHZ and with input transformer is about 50KHz (limited by the input audio transformer).

3. Square wave: Do not see much over shoot at up to 100kHz. At below 500Hz, ther is a bit tilt upward at the starting of the step. I am not too sure if it is due to my sig gen output capacitor or not. No ringing at all.

4. Drift: Yes there is drift but the adjustment for bal out can be down to below 0.3mV and SE out can be down to 1mV. I use my finger to touch two of output bjts to get worst drift due to variation of heat dissipation. The result is that Bal drift is about 6mV and the SE out to ground is about 12mV. Lastly I use my hot air gun to heat up the whole pcb to about 50 deg C and the drift from Bal out or SE to gound is about the same at below 1mV. So my conclusion is to make sure the whole board is put inside a close enclosure with no air vantilation. NP put the board reverse and have the Pots on top for final adjustment should be sufficient for my application.

Regards,
Spencer Cheung
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Old 26th September 2006, 02:39 PM   #58
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Hi Spencer,

Quote:
Originally posted by spencer
[B]Cheff,

2. Freq response: This is more difficult to measure as I dont have bal input in my scope but I use a audio transformer to couple the sig gen as a bal input to the UGS. -3db is at about 1MHZ and with input transformer is about 50KHz (limited by the input audio transformer).
You could measure it simply by shorting one input to ground and
taking indifferently one output or the other... Won't have a great
impact on the BW making it work as a unbal to bal converter

Quote:
3. Square wave: Do not see much over shoot at up to 100kHz. At below 500Hz, ther is a bit tilt upward at the starting of the step. I am not too sure if it is due to my sig gen output capacitor or not. No ringing at all.
Could you DC couple your signal generator and scope ?
I haven't seen this LF tilt. Just clean square signals...

Quote:
4. Drift: Yes there is drift but the adjustment for bal out can be down to below 0.3mV and SE out can be down to 1mV. I use my finger to touch two of output bjts to get worst drift due to variation of heat dissipation. The result is that Bal drift is about 6mV and the SE out to ground is about 12mV. Lastly I use my hot air gun to heat up the whole pcb to about 50 deg C and the drift from Bal out or SE to gound is about the same at below 1mV. So my conclusion is to make sure the whole board is put inside a close enclosure with no air vantilation. NP put the board reverse and have the Pots on top for final adjustment should be sufficient for my application.
Yep. That's the thermal unbalance between each quadrant of the circuit
that causes drifts... If all is equally heated, all the properties should
move together and limit drifts. That why I used small heatsinks,
but if you can live with these small variations, that's nice

So keep us informed of your progress, most of all when you will have
listened to the babies...

Regards,
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Old 26th September 2006, 10:54 PM   #59
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Default What about Tino's UGS

Hello All,

I'm curious if anyone has considered Tino's UGS circuit (see my rendering below or the orignal thread here: X2_ugs3,4)

It's simulated well. It uses complimentary differential folded cascode with the JFETs. Seems to get slightly better THD with my simulator for what that's worth. I'm still more inclinded toward Cheff's UGS. as it's been built and tested, but Mr. Pass seemed to give the nod to Tino's rendition. (He mentioned that the design improved "for him" with CCS in place of the 200-ohm drain resistors.) Also, I think the way Tino provides "knobs" to set the base voltages using another JFET and pot could have it's benefits. Could something like this work in Cheff's design for improved control? Well, just wondering what others think about Tino's design. The X2_ugs3,4 thread kind of just died about a year ago and nothing more was said since about Tino's design, though it seemed promising.

I've just obtained several of the 389/109 dual-pack JFETs (thanks to Dan Garner), and I will be mocking up Cheff's UGS circuit in the lab here once I get hold of the transistors and a few resistors.

Cheff, did you ever get a chance to play with the different BJT currents? Can you tell me where you obtained your heatsink structure(s) for the UGS?
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Old 26th September 2006, 11:01 PM   #60
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Both designs have merit, the folded cascode being favored
for low gain, low feedback and the "current mirror" version
more appropriate to high gain, high power.
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