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Old 12th November 2005, 06:46 AM   #101
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How much space do the output caps have? abd what is the pin distance for them?

How do you want to heatsink the fets?
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Old 12th November 2005, 10:03 AM   #102
steenoe is offline steenoe  Denmark
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New improved safer version.
Very nice Russ If you look at it, there is a "Twisted X" in the middle Cool.

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How do you want to heatsink the fets?
All the fets can be mounted on the same heatsink. Like you would do in a poweramp, just in a smaller scale. Thats actually pretty good. All the fets will have the same temp.

Steen.
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Old 12th November 2005, 10:08 AM   #103
Nisbeth is offline Nisbeth  Denmark
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Originally posted by steenoe All the fets can be mounted on the same heatsink. <SNIP> All the fets will have the same temp.[/B]
Don't be so sure of that


/U.
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Old 12th November 2005, 10:16 AM   #104
steenoe is offline steenoe  Denmark
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Don't be so sure of that
I guess you are right Nisbeth. Nonetheless they stand a better chance tracking the temp when mounted on the same sink, instead of having 5 seperate sinks, dont they?

Steen
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Old 12th November 2005, 10:17 AM   #105
Nisbeth is offline Nisbeth  Denmark
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Allright, you win


/U.
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Old 12th November 2005, 01:22 PM   #106
awpagan is offline awpagan  Australia
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just saw the your pcb layout tonight
did this months ago may or maynot be helpful.

based off metalman's schematic
top Ground plane
very close to similar track lenghts (for symmetry) but doesn't look it.
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Old 12th November 2005, 01:46 PM   #107
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Default Options galore. :)

Ok here is the PCB so far..

You could use a vary wide variety of output caps either axial or radial. You could even use something like a high quality axial bipolar electrolytic bypassed with 1-10uf film cap if you chose.
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Old 12th November 2005, 02:23 PM   #108
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Default Same thing with groundplane

No sure if this is a big improvemnet or not, but I added a ground plane with a single connection to PGND at the GND connector.
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Old 12th November 2005, 02:57 PM   #109
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Default oops

Ignore the last PIC it has a problem with the GP

Here is the correct version:
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Old 12th November 2005, 06:17 PM   #110
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Russ,

I had a closer look to the layout this morning and if you donít mind I would like to point a couple of small things I would do different:

R12/13 should finish as close as possible to the gates of the FET. I think is doable if you have those resistors in an upright position and moving the red traces a bit downwards.

You have fastons on the input signal and both pins seem to connect to the input. In my opinion one should be ground to properly terminate the ground input to the pcb. I myself will not use the faston connector for the input but of course thatís optional.

I guess that more important that a ground plane is to have a correct star grounding for the input.

I might have some other suggestions but that will take me a while to look over the schematic and layout.

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