Matching JFETs, JFET behavior

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I bought some 2SK170s and some 2SJ74s to build F4 boards from the DIY Audio Store. The boards are on the way.

Never used JFETs before so it is all new to me.

I want to match N-P pairs for this F4 build and for future builds.

My assumption is that, for testing/matching, I want to choose a Vds close to the usage case and also that gm around zero Vgs should be close for the matched pair. Is this correct?

Now a behavior question. I am using 20V Vds for the matching exercise. I set the gate to zero volts and measure drain current. The current starts a 10.18ma and eventually ends at 10.355 mA after a long wait (minutes). The same long settling happens at -0.1V Vgs and +0.1V Vgs.

It seems that the JFET takes a while to come to equilibrium. Is this due to self-heating?
 
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Yep, the Toshibas tend to climb in Idss when heating up. Even when you breathe around them they change in Idss. Or open a window.
20Vds x 10.18mA = around 200mW, that's half the maximum dissipation.
Don't go to far with + voltages at the gates for 2sk170. (and - voltages for 2SJ74)
 
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